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Publications (9)
A current-mode interface chip for Silicon Photomultiplier (SiPM) array based positron emission tomography (PET) imaging front-ends is described. The circuit uses a high-speed current amplifier with a low input impedance, to minimize signal loss at the SiPM amplifier interface. To reduce the impact of dark noise, a novel high-speed threshold detecti...
Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. However, reduced size implies a corresponding increase in the detector density, resulting in a proporti...
Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. The increased detector density requires a proportionally larger number of channels to interface the SiP...
The recent realization of Silicon Photomultiplier (SiPM) devices as solid-state detectors for Positron Emission Tomography holds the promise of improving image resolution, integrating a significant portion of the interface electronics, and potentially lowering the power consumption. Our lab has previously reported on novel board-level readout elect...
Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. The increased detector density requires a proportionally larger number of channels to interface the SiP...
Our lab has previously reported on novel board-level readout electronics for an 8×8 silicon photomultiplier (SiPM) array featuring row/column summation technique to reduce the hardware requirements for signal processing. We are taking the next step by implementing a monolithic CMOS chip which is based on the row-column architecture. In addition, th...
In this article we propose a novel Auto-tuning scheme for a first order GmC filter. GmC filter is considered to be one of the most suited architectures for high frequency operation among various type of analog filters..Our work involves the tuning of the cutoff frequency of the filter utilizing a mixed-signal design approach. A comparator senses th...
