Roberto Esper-Chaín

• PhD
• Professor (Associate) at University of Las Palmas de Gran Canaria

Today, mechanical tracking systems are becoming increasingly compact, enabling a new range of civil and military applications. These include aerial laser scanning, for which Risley prisms are used. In Risley systems, the so-called inverse problem, which focuses on obtaining the angles of the prisms for a given target coordinate, has not yet been so...

Today, mechanical tracking systems have been downsized to allow them to be used in the field of airborne laser communications and in the military domain. Risley systems are used for this purpose, which work by directing a beam of light to a given target point, this procedure is commonly known as the inverse problem. In this paper, an analytical met...

Gaussian laser beam diameter can be estimated using quadrant photodiodes and x-y micropositioners. The resolution of the measurement reported depends on the resolution of the micropositioners. In this article, an improvement of the resolution using subsampling estimation is reported. This technique in combination with configurable quadrant photodio...

In recent years, Wireless Sensor Networks have experienced significant growth, mainly motivated by the development of standard communication protocols and the availability of low cost microcontrollers and wireless transceivers, resulting in low-power small-size sensing and data processing capable devices, and wireless communication links. In this p...

Position sensitive detectors (PSDs), used in high-end biotechnology, are based on optical sensors built over quadrant photodetectors (QPDs) or active pixel sensor (APS). These devices are intended to measure slight movements of laser spots. The QPD are, by far, the best approach in terms of resolution and noise, but requires complex and expensive x...

Position sensitive detectors (PSDs), used in high-end biotechnology, are based on optical sensors built over quadrant photodetectors and active pixel sensors. These devices are intended to measure slight movements of a laser spot. Quadrant photodetectors (QD) are, by far, the best approach in terms of resolution and noise, but require complex and e...

In recent years, IEEE 802.15.4-based Wireless Sensor Networks (WSN) have experienced significant growth, mainly motivated by the standard features, such as small size oriented devices, low power consumption nodes, wireless communication links, and sensing and data processing capabilities. In this paper, the development, implementation and deploymen...

In recent years, Wireless Sensor Networks (WSN) have experienced significant growth, mainly motivated by low cost wireless transceivers and microcontroller availability, and by communication standard development, resulting in small size oriented, low power consuming, wireless communication links, and sensing and data processing capable devices. In...

In recent years, Wireless Sensor Networks (WSN) have experienced significant growth, mainly motivated by low cost wireless transceivers and microcontroller availability, and by communication standard development, resulting in small size oriented, low power consuming, wireless communication links, and sensing and data processing capable devices. In...

In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose line card which includes a Virtex-II 6000 FPGA. This switch is named GMDS (Gigabit MultiDrop Switch) and its main features are the switch matrix replacement by the multidrop...

A novel variable length packet scheduling algorithm focused on real output queue reference architecture is presented in this paper. The main features of this packet scheduler development are the Quality of Service (QoS) and variable length packet support. The packet scheduler supports up to eight traffic classes which can be assigned up to two diff...

In this paper, the implementation of a 900 MHz multiphase oscillator with sinusoidal outputs in SiGe technology is presented. The circuit is based on a differential cross-coupled topology formed by four differential LC-oscillators that provide eight output signals with 45deg phase differences. The whole circuit was implemented full-custom. The fina...

In this paper, the implementation of a 2.5 Gbps 1:32 deserializer in SiGe BiCMOS technology using standard cells and ECL bipolar circuits in order to minimize power consumption, is presented. The deserializer is composed of two main circuits: a demultiplexer and a clock distribution network. The architecture of the demultiplexer is based on a tree...

Maximum data rate in today's available multidrop backplanes is limited to 400 Mbps due to signal integrity concerns. In this paper, an experimental gigabit multidrop serial backplane for high-speed digital systems based on a novel asymmetrical broadband power splitter configuration with matching trace impedance, is presented. Experimental results o...

A multidrop backplane based on point-to-multipoint serial links enables interconnection between line cards without requiring a central switch fabric. However, maximum data rate in today's available multidrop serial links is limited to 400Mbps due to signal integrity concerns. In this paper, a novel gigabit multidrop serial link configuration for hi...

The maximum data rate in today's available multidrop backplanes is significantly limited due to signal integrity concerns. In this brief, a novel gigabit multidrop serial link configuration for high-speed digital systems based on newly developed asymmetrical broadband power splitters with matching trace impedance, is presented. The proposed power s...

Classification of Internet protocol (IP) packets has become a bottleneck for the effective operation of QoS capable routers. In this paper, a novel packet classification scheme for high performance routers on different QoS architectures, named split-engine packet classification (SPC), is proposed. The key feature of the presented architecture is it...

Nowadays clock recovery units are key elements in high speed digital communication systems. For an efficient operation, this units should generate a low jitter clock based on the NRZ received data, and be tolerant to long absence of transitions. Architectures based on Hogge phase detectors have been widely used, nevertheless, they are very sensitiv...

Nowadays digital networks require architectures based on standards that are implemented independently of the technology. Besides, these network specifications can easily change to include novel services. For these reasons, dominant trends are to design and verify systems at high level, prior to technology mapping. In this paper, a methodology is pr...

Scheduling algorithms developed for virtual-output-queuing (VOQ) switches have focused on the throughput enhancement, rather than provide QoS guarantees for different priority levels. Presented, is a new scheduling scheme to effectively support real-time and data applications in VOQ switches with negligible complexity increment.

Virtual output queue (VOQ) is an efficient architecture for high-speed switches because it combines the low cost of input-queuing with high performance of output-queuing. The achievable throughput and delay performance heavily depends on the scheduling algorithm used to resolve the contention for the same output ports in each cell slot. Most VOQ sc...

This article describes an ATM transceiver implementation with add/drop function over Synchronous Digital Hierarchy (SDH) able to handle STM-16c (OC-48c) signals. The design has been developed using Vitesse HGaAs-IV technology using Direct Coupled FET Logic (DCFL) standard cells and obtaining, in this way, a logic gate level description which could...

Today's data communication systems are demanding increasing off-chip data rates. To satisfy this demand, high-speed serial links are used, saving area and power dissipation compared to highly parallel buses. However, power dissipation and noise generated by this system is still a critical issue. In this article, a novel approach using differential...

Today's increasing data rates in digital communication circuits are demanding higher speeds in the interchip communication. This throughput can be achieved using high rate serial links. Good noise inmunity can be obtained by means of differential strategies and an important power reduction can be obtained by using current mode operation. In this pa...

Mathematical Morphology appears as a theory that can solve some drawbacks of the classical lineal image processing. Linear filters generate a spatial distortion from initial image, what gives as a result that specific algorithms are usually needed for each process with a complexity that can not be implemented in VLSI systems for Real Time Image Pro...

The parallelization of numerical algorithms is very important in scientific applications, but many points of this parallelization remain open today. Specifically, the overhead introduced by loading and unloading the data degrades the efficiency, and in a realistic approach should be taking into account for performance estimation. The authors of thi...

In this paper we present the design of a 2D discrete cosine transform (2D-DCT) processor and its implementation using 0.6 /spl mu/m GaAs technology. The architecture of the processor, that resembles an FCT-MMM (fast cosine transform-matrix matrix multiplication) architecture, was development using distributed arithmetic (DA) in order to reduce the...

This paper reports on work done by project GARDEN under EU ESPRIT Research Programme in the past three years for developing ATM line units and ATM switch fabric operating at 2.5 Gb/s, and ongoing work for system upgrading to 10 Gb/s operation. A circuit of each type of unit is presented. This project has required the detailed specification of the s...

In this paper we present a 0.6um GaAs MESFET im­plementation for a 2.5Gb/s ATM transceiver. The good power-delay feature of the technology, gives a power con­sumption below 5W for the transceiver. Due to the lack of recommendations for 2.5Gb/s ATM physical layer, the work presented uses the existing recommendations given by the ITU-T for 155Mb/s an...