R. C. Baumann

R. C. Baumann
Radiosity Solutions LLC, Dallas, Texas, USA

PhD
Providing technical solutions for radiation effects in a variety of IC, system, and vehicle developments.

About

79
Publications
23,483
Reads
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4,060
Citations
Introduction
Robert Baumann is founder of Radiosity Solutions, providing customers with expert advice and solutions for their radiation effects and semiconductor reliability challenges (www.radiositysolutions.com). He is also a research scientist at University of Texas at Dallas focused on building a harsh environment electronics center and the development of tools to model and characterize radiation effects.
Additional affiliations
July 2022 - present
University of Texas at Dallas
Position
  • Research Scientist
Description
  • Creating Center for Harsh Environment Electronics.
October 2018 - December 2022
Southern Methodist University
Position
  • Professor
August 2018 - present
Radiosity Solutions LLC
Position
  • Consultant

Publications

Publications (79)
Article
We present the results of accelerated radiation testing on an AMD APU, three NVIDIA GPUs, an Intel accelerator, an FPGA, and two DDR memories under thermal and highenergy neutrons separately. The sensitivity depends on the device type and the code being executed and we show that thermal neutrons contribute to the error rate of modern computing devi...
Book
Your comprehensive guide to radiation effects for electronics. Building on decades of knowledge from TI’s expert teams, this 100+ page e-book features the latest design considerations for engineers who work on space, industrial and/or terrestrial applications. Learn about radiation environments, their effects on IC devices and how to mitigate them...
Article
A novel wafer-level method is described for predicting lateral DMOS transistor single event burn out (SEB) levels to assist device engineers in the development phase of radiation hardened power transistors. The method uses a Transmission Line Pulse (TLP) tester together with scribe-line transistor test structures. Technology Computer-Aided Design (...
Article
We present experimental evidence of single electron-induced upsets in commercial 28 nm and 45 nm CMOS SRAMs from a monoenergetic electron beam. Upsets were observed in both technology nodes when the SRAM was operated in a low power state. The experimental cross section depends strongly on both bias and technology node feature size, consistent with...
Article
Variability in energy deposition caused by intrinsic statistical fluctuations is quantified for specific radiation environments. Differences in effective flux are observed for minimally ionizing particles, typically leading to a decrease in predicted soft error rate, the magnitude of which depends on the threshold LET. When compared to spectra acco...
Conference Paper
Full-text available
Radiation and Temperature Characterization results of a 2T-2C ferroelectric random access memory (FRAM) are presented. This includes Total Ionizing Dose (TID), Single Event Effects (SEE) and Temperature evaluation at 215C.
Conference Paper
Full-text available
In the benign terrestrial environment, radiation is often the dominant failure mechanism in qualified microelectronics. Things only get worse in high reliability environments where the radiation exposure is more intense and prolonged! After a review of key radiation mechanisms and various environments, we consider “dementia” caused by permanent deg...
Conference Paper
Full-text available
After a brief overview of the aerospace radiation environment and how chronic accumulated radiation exposure (total ionizing dose and neutron/proton dose) and single-event effects (SEEs) plague electronics, we will consider the unintentional improvements in radiation hardness that have evolved as a natural consequence of technology scaling. This “n...
Conference Paper
Full-text available
Covers the challenges faced by commercial semiconductor vendors for mitigating radiation induced effects
Patent
Full-text available
A method includes testing to failure a plurality of semiconductor test structures, measuring a parameter of each semiconductor test structure after experiencing a failure, and generating a cumulative probability distribution function (CPDF) of cumulative probability versus the measured parameter after failure for the plurality of semiconductor test...
Article
We present experimental evidence of single-event upsets in 28 and 45 nm CMOS SRAMs produced by single energetic electrons. Upsets are observed within 10% of nominal supply voltage for devices built in the 28 nm technology node. Simulation results provide supporting evidence that upsets are produced by energetic electrons generated by incident X-ray...
Conference Paper
Full-text available
Introduction to real impact of radiation effects (translated by Dr. Kobayashii (Kazutoshi, Kyoto Institute of Technology)
Conference Paper
Full-text available
Upsets from Alpha Particles, translated by Dr. Kobayashii (Kazutoshi), Kyoto Institute of Technology
Article
Full-text available
We review the major radioactive isotopes formed in nuclear reactors and consider how these were released and dispersed in the days following the Fukushima-Daiichi accident. The risk of contamination from uranium and plutonium isotopes at semiconductor manufacturing sites in Japan is discussed, and the first report of alpha-counting measurements is...
Article
Full-text available
Interview by TIGNews on history and current status of SIA effort to change export laws to protected commercial semiconductors from inadvertent capture as munitions.
Article
Neutron-induced charge collection data and computer simulations presented here show that the presence of high-Z materials, like tungsten, can increase the single event upset (SEU) and multiple cell upset (MCU)cross sections of high critical charge $({\rm Q}_{\rm crit})$ devices exposed to the terrestrial neutron environment because of interactions...
Article
Full-text available
The once-ephemeral soft error has recently caused considerable concern for manufacturers of advanced silicon technology as this phenomenon now has the potential for inducing the highest failure rate of all other reliability mechanisms combined. We briefly review the three radiation mechanisms responsible for causing soft errors in commercial electr...
Conference Paper
Experimental results are presented that indicate technology scaling increases the sensitivity of microelectronics to soft errors from low-energy muons. Results are presented for 65, 55, 45, and 40 nm bulk CMOS SRAM test arrays. Simulations suggest an increasing role of muons in the soft error rate for smaller technologies.
Article
Experimental data are presented that show low-energy muons are able to cause single event upsets in 65 nm, 45 nm, and 40 nm CMOS SRAMs. Energy deposition measurements using a surface barrier detector are presented to characterize the kinetic energy spectra produced by the M20B surface muon beam at TRIUMF. A Geant4 application is used to simulate th...
Article
Heavy ion data for custom SRAMs fabricated in a 45-nm CMOS technology demonstrate the effects of N- and P-well contact densities on single-event latchup. Although scaling has improved latchup robustness, process-level immunity has not been achieved, indicating a continued need for latchup mitigation techniques. A simple, algorithmic approach for se...
Article
Thin films (.1-.6 μm) of LiNbO3 have been deposited on silicon substrates by rf reactive sputtering. MFS (metal-ferroelectric-semiconductor) capacitor structures were created by a liftoff process which physically isolated small areas of LiNbO3. Standard MOS (metal-oxide-semiconductor) electrical characterization techniques were used to determine th...
Article
A 1 GeV/amu <sup>56</sup>Fe ion beam allows for true 90° tilt irradiations of various microelectronic components and reveals relevant upset trends at the GCR flux energy peak. Three SRAMs and an SRAM-based FPGA evaluated at the NASA Space Radiation Effects Laboratory demonstrate that a 90° tilt irradiation yields a unique device response. These til...
Conference Paper
Predictions of single and multiple cell upsets in a 65 nm bulk CMOS SRAM are presented for the low-energy (<; 10 MeV) portion of the NYC neutron spectrum. Scattering is identified as a significant nuclear mechanism for this regime and the consequence for multiple bit upset is discussed. The contribution is compared to the full spectrum.
Article
Direct ionization from low energy protons is shown to cause upsets in a 65-nm bulk CMOS SRAM, consistent with results reported for other deep submicron technologies. The experimental data are used to calibrate a Monte Carlo rate prediction model, which is used to evaluate the importance of this upset mechanism in typical space environments. For the...
Conference Paper
Full-text available
A 1 GeV/u <sup>56</sup>Fe ion beam allows for true 90° tilt irradiations of various microelectronic components and reveals relevant upset trends for an abundant element at the GCR flux energy peak.
Article
Single event latchup (SEL) in a 65 nm CMOS SRAM technology due to heavy ions is observed and device sensitivity is shown to be a strong function of lateral beam orientation, angle of incidence, and temperature. Experimental results show the importance of testing at multiple lateral beam orientations to properly characterize device sensitivity.
Article
The effects of device orientation on heavy ion-induced multiple-bit upset (MBU) in 65 nm SRAMs are examined. The MBU response is shown to depend on the orientation of the device during irradiation. The response depends on the direction of the incident ion to the n- and p-wells of the SRAM. The MBU response is simulated using Monte Carlo methods for...
Article
Using a detailed memory failure cluster analysis we demonstrate a novel direct measurement of the charge collection efficiency ratio of N+ and P+ diffusions for 90 nm CMOS in the terrestrial neutron environment. For the first time, we have proved empirically that the Nwell junction is a strong barrier to charge sharing, and experimentally measured...
Article
Full-text available
The results of a physical experiment and extensive simulation runs are presented for the first time demonstrating the significant effects of geometry and air absorption on accelerated alpha particle soft error rate tests. These results show that geometry and absorption must be properly accounted for even when the source is in close proximity to the...
Article
Full-text available
Single event latchup (SEL) in a 65 nm CMOS technology is examined with respect to strike angle of incidence and variations in device temperature. A significant difference in device sensitivity is observed with a change in the orientation of grazing angle strikes. The impact of an extremely high aspect ratio sensitive volume on SEL rate is discussed...
Chapter
As the dimensions and operating voltages of microelectronic are aggressively reduced to satisfy the consumer’s insatiable demand for higher density, increased functionality, and reduced power consump-tion, their sensitivity to radiation has increased dramatically. Radiation effects in semiconductor devices are responsible for a plethora of reliabil...
Article
Full-text available
The once-ephemeral radiation-induced soft error has become a key threat to advanced commercial electronic components and systems. Left unchallenged, soft errors have the potential for inducing the highest failure rate of all other reliability mechanisms combined. This article briefly reviews the types of failure modes for soft errors, the three dom...
Article
Full-text available
As the dimensions and operating voltages of computer electronics shrink to satisfy consumers' insatiable demand for higher density, greater functionality, and lower power consumption, sensitivity to radiation increases dramatically. In terrestrial applications, the predominant radiation issue is the soft error, whereby a single radiation event caus...
Conference Paper
This paper presents an approach to characterize soft error rates (SER) for an advanced 0.13 mu m, multi-core, voice-over-packet digital signal processor (DSP) system in the accelerated alpha-particle and neutron environments. In both cases, we observed a close correlation when we compared the SER data of the DSP product memory to the stand-alone SR...
Chapter
The once-ephemeral soft error has recently caused considerable concern for manufacturers of advanced silicon technology as this phenomenon now has the potential for inducing the highest failure rate of all other reliability mechanisms combined. We briefly review the three radiation mechanisms responsible for causing soft errors in commercial electr...
Conference Paper
Full-text available
Summary form only given. We consider the soft error sensitivity trends to various memory and logic components as they are scaled to smaller dimensions, higher integration densities, and lower operating voltages. We also review the three radiation mechanisms responsible for soft errors in the terrestrial environment and discuss the methods for chara...
Article
Full-text available
The once-ephemeral soft error phenomenon has recently caused considerable concern for manufacturers of advanced silicon technology. Soft errors, if unchecked, now have the potential for inducing a higher failure rate than all of the other reliability-failure mechanisms combined. This article briefly reviews the three dominant radiation mechanisms r...
Conference Paper
Full-text available
Short tutorial on SEU/SER and comparison of SRAM and DRAM scaling trends
Conference Paper
Full-text available
The soft error rate (SER) of advanced CMOS devices is higher than all other reliability mechanisms combined. Memories can be protected with error correction circuitry but SER in logic may limit future product reliability. Memory and logic scaling trends are discussed along with a method for determining logic SER.
Article
Full-text available
In this review paper, we summarize the key distinguishing characteristics and sources of the three primary radiation mechanisms responsible for inducing soft errors in semiconductor devices and discuss methods useful for reducing the impact of the effects in final packaged parts
Article
The impact of cosmic neutron induced 10B fission in production submicron SRAM devices is reported for the first time. Using a cold neutron beam to accelerate soft error rate events, we unambiguously demonstrate that neutron induced 10B fission can be a significant source of soft errors in deep-submicron SRAMs fabricated with borophosphosilicate gla...
Conference Paper
A charge offset scanning method of determining individual cell leakages in DRAM devices is described. The leakage behaviour of cells from the main and tail distributions is compared and the results of data retention studies on a 0.5µm CMOS embedded DRAM technology for ASIC applications are also discussed. An order of magnitude improvement in the re...
Presentation
Full-text available
Presentation slides from talk that highlights impact of thermal neutron flux with 10B as dominant SEU mechanism in SRAMs
Conference Paper
Full-text available
Static random access memories (SRAM) from two submicron CMOS production technologies with and without borophosphosilicate glass (BPSG) were irradiated with cold neutrons. Experiments with different levels of neutron shielding and an examination of the soft error rate (SER) vs voltage characteristics proved that the observed soft failures were cause...
Article
The sensitivity of future semiconductor devices is going to be far more sensitive to ionizing radiation than present day chips. Ionizing radiation can lead to the uncontrolled deposition and movement of charge within an IC, and thereby produce what is called a soft error, or Single Event Upset (SEU) in the memory device. When the induced charge is...
Conference Paper
Channel hot carrier (CHC) effects in PMOS transistors increase the drive current and reduce the threshold voltage (Vt). While these changes improve the device switching speed, the decreased Vt renders the transistor harder to “turn off”. This work focused on defining the punch through voltage (BVDSS) of PMOS transistors from a CMOS submicron proces...
Conference Paper
The interaction of cosmic ray thermal neutrons and boron is demonstrated as the primary source of radiation in devices containing borophosphosilicate glass (BPSG). Simulations indicated that this source of radiation generates enough charge to induce soft errors in memory devices. The results of a study of DRAM devices also demonstrated that this ra...
Conference Paper
Full-text available
The interaction of cosmic ray neutrons and boron is demonstrated as the dominant source of alpha particles and other radiations in electronic devices utilizing borophosphosilicate glass (BPSG). A simple process modification is proposed to significantly reduce this intense source of ionizing radiation without compromising the reflow and passivation...
Conference Paper
A double-sided adhesive tape is typically used as an insulator and mechanical buffer layer between the chip and lead frame in lead-on-chip (LOC) packages. The costs associated with the lead frame and tape process make the current LOC package ten times more expensive than conventional packaging. A new tapeless LOC package process has been developed...
Conference Paper
Full-text available
The increasingly severe demands of concurrently increasing die size while reducing package size have made the mechanical stability of novel surface mount technologies a primary concern. Package cracks induced by interfacial delamination between the chip backside surface and the epoxy molding resin are a major failure mode in Lead-On-Chip (LOC) pack...
Conference Paper
The increasingly severe demands of concurrently increasing die size while reducing package size have made the mechanical stability of novel surface mount technologies a primary concern. The dominant issue is device failure due to package cracking caused by interfacial delamination between the polyimide-coated chip surface and the epoxy molding resi...
Article
The deposition of thin films of lithium niobate (LiNbO 3 ) on silicon with rf magnetron sputtering has been investigated. A matrix of experiments was designed to determine the effect of several parameters on the resulting film quality. Under optimized conditions, oriented polycrystalline films of LiNbO 3 are produced that exhibit a columnar grain s...
Article
The incorporation of a thin film of lithium niobate (LiNbO3) in a conventional MOS (metal-oxide-semiconductor) structure gives the possibility of two fundamentally different types of computer memory architectures. One, based on ferroelectric switching involves the reorganization of charge in the transistor channel to compensate for the change in po...
Technical Report
Full-text available
Phosphate rock, from which phosphoric acid is obtained, can contain high levels of alpha-emitting impurities (primarily uranium and its radioactive daughter products). Since phosphoric acid is commonly used in semiconductor processing facilities, and because the ionization effects of alpha radiation are deleterious to electronic memory devices, the...
Technical Report
Full-text available
The alpha particle stopping effectiveness of three different polyimides has been investigated. A set of accelerated soft error rate experiments was performed in which the error rate was monitored as different thicknesses of polyimide were placed between the device and the alpha source. For each of the three polyimides evaluated, ASER data was obtai...
Article
Thin films of LiNbO have been RF sputter deposited on silicon and sapphire substrates. A number of analytical techniques have been used to determine the physical structure of these films. This analysis shows that the resulting films are stoichiometric LiNbO(3) and oriented polycrystalline in nature. It is now possible to consider applications which...
Article
Thin films of LiNbO3 have been grown on silicon substrates by reactive RF sputtering. Films grown on (111) silicon heated to 550°C have been shown by x-ray diffraction techniques to be oriented with the c axis normal to the silicon surface. A lift-off process has been used in an attempt to isolate regions of LiNbO3 to form metal-ferroelectric-insul...
Article
Thin films (0.1–0.6 μm) of LiNbO 3 have been deposited on silicon substrates by reactive rf sputtering. Under optimized deposition conditions the resulting thin films of LiNbO 3 were optically transparent and adhered well to the silicon substrates. X‐ray diffraction showed the films were oriented polycrystalline with the c axis normal to the silico...
Conference Paper
The results of a number of analytical measurements on lithium niobate films deposited on silicon and sapphire substrates of different orientations are reported. It has been determined that high-quality LiNbO<sub>3</sub> films can be deposited on various substrates through RF sputtering. It has been established that the orientation and crystallinity...
Technical Report
Full-text available
Report of Neutron Activation Analysis results investigating the content of uranium and thorium impurity levels in two key production VLSI metallizations.
Article
Full-text available
Ferroelectric thin films of lithium niobate have been epitaxially grown on a variety of silicon and gallium arsenide substrates by reactive r.f. sputtering. The deposition process was optimized by independently varying the substrate temperature, oxygen-argon ratio, target mixture, substrate type, and deposition times. The results of these tests are...
Article
Full-text available
The direction of polarization in thin-film LiNbO3 has been shown to be reversible under the influence of an applied electric field at room temperature. These films were r-f sputtered on silicon substrates and their dielectric and photoelectric properties have been characterized previously. They have exhibited photocurrents under illumination which...
Article
Thin films of lithium niobate were r.f. sputtered on device structures† which were then processed using a molybdenum based lift-off procedure. This procedure facilitated the fabrication of ferroelectric gate field-effect transistors without the use of complicated alignment and etch techniques. The resulting transistors had a .5 μm gate layer of lit...
Article
Thin films of barium strontium titanate were r.f. sputter deposited at various temperatures, gas pressures, and gas compositions on both p-type and n-type (111) and (100) silicon substrates. Ellipsometry techniques were used to determine thickness and refractive index, while X-ray Bragg diffraction was used to determine the degree of crystallinity...
Article
To design more radiation tolerant Integrated Circuits (ICs), it is essential to create and test accurate models of ionizing radiation induced charge collection dynamics within microcircuits. A new technique, Diffusion Time Resolved Ion Beam Induced Charge Collection (DTRIBICC), is proposed to measure the average arrival time of the diffused charge...

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