Patrick W C Ho

• PhD in Electronics Engineering
• Monash University Malaysia

This dissertation reports the research work that was conducted to propose a non-volatile architecture for FPGA using resistive switching devices. This is achieved by designing a Configurable Memristive Logic Block (CMLB). The CMLB comprises of memristive logic cells (MLC) interconnected to each other using memristive switch matrices. In the MLC, no...

In this work, a novel memristive SRAM cell is designed using seven transistors and one memristor (7T1M). In this 7T1M SRAM cell, the non-volatile functionality is achieved by adding a single memristor and a transistor to the design of a volatile SRAM cell. The designing of the 7T1M SRAM cell also introduces VC-TRL which allows bidirectional current...

This article proposes a Configurable Memristive Logic Block (CMLB) that comprises of novel memristive logic cells. The memristive logic cells are constructed from memristive D flip-flop, 6-bit non-volatile look-up table (NVLUT), and multiplexers. The memristive logic cells are interconnected using memristive switch matrix cells to form the CMLB. Th...

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performances of TiO2 and TaO2 nonvolatile memristive devices were compared and the factors that make TaO2 memristive devices better than TiO2 memristive devices were studied. T...

This work presents the circuit level design of a non-volatile D-latch (NVDL) using memristor that retains the stored data in the event of power interruption. The programming complexity of proposed NVDL, unlike previous NV latches, is simplified. The proposed NVDL is designed using 32nm node and results are compared with the volatile CMOS based D-la...

This paper presents a novel mathematical model of the bipolar resistive switching (BRS) of the metal-insulator-semiconductor-metal (MISM) in a Pt/Ta2O5/TaOx/Pt memristor. The proposed model is based on quantum mechanics and describes the BRS behaviour based on electron band theory and the physical characteristics of the metal-insulator-semiconducto...

In this paper, an improved memristor SPICE model of [1] is presented by incorporating dynamic ground feature. Thus the proposed model enables the memristor to admit bidirectional current flow regardless of the manner it is connected to its voltage source and behaves similar to the electrical characteristics of the physical memristor. The simulation...

This paper presents performance comparison between two emerging resistive Non-Volatile Memory (NVM) technologies; namely Memristors and Phase Change Memory (PCM); using nanocrossbar architecture. A comparison in terms of leakage current, reading and writing delay, and energy consumption between both non-volatile memory devices, with SRAM based nano...

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performance of physical TiO2 and TaO2 nonvolatile memristive devices were compared in terms of switching speed, retention and endurance. TaO2 memristive devices have shown bett...

In recent researches, much emphasis has been placed in developing non-volatile memories as candidates for replacement of volatile memories. Apart from non-volatility, memristive devices also have high switching speed, low energy consumption, and small device size. In this article, a novel one-bit memory cell using two transmission gates and one mem...