Omar Nibouche

• Newcastle University

Shoeprint evidence collected from crime scenes can play an important role in forensic investigations. Usually, the analysis of shoeprints is carried out manually and is based on human expertise and knowledge. As well as being error prone, such a manual process can also be time consuming; thus affecting the usability and suitability of shoeprint evi...

This paper presents a bimodal biometric recognition system based on the extracted features of the human palmprint and iris using a new graph-based approach termed Fisher locality preserving projections (FLPP). This new technique employs two graphs with the first being used to characterize the within-class compactness and the second dedicated to the...

In this paper, efficient pipeline architectures that implement the 2-D FFT are presented. Based on the Vector Radix approach, the new structures alleviate the use of memory banks and the transposition of data of the row–column technique. Architectures for Vector Radix 2×2 algorithm and for a modified Vector Radix 4×4, called Vector Radix 22×22 algo...

In forensic investigations, it is common for forensic investigators to obtain a photograph of evidence left at the scene of crimes to aid them catch the culprit(s). Although, fingerprints are the most popular evidence that can be used, scene of crime officers claim that more than 30% of the evidence recovered from crime scenes originate from palms....

In this paper, we suggest a solution for the problem of scene-of-crime shoeprints retrieval based on the use of multi-scale Harris points, which are a set of very distinctive points of interest in an image, combined with SIFT descriptor. We show that such combination can overcome the issue of retrieval of partial prints in the presence of scale and...

In this paper, we propose a solution for the problem of rotated partial shoeprint retrieval, based on the combined use of local points of interest and SIFT descriptor. Once the generated features are encoded using SIFT descriptor, matching is carried out using RANSAC to estimate a transformation model and establish the number of its inliers which i...

Intense work has been reported in the last decade for person's recognition using palmprint biometric patterns. However, there has been a little interest in the security of palmprint recognition systems. This paper introduces a new blind watermarking technique to address the vulnerabilities of a palmprint recognition system against replay attacks. I...

Number theoretic transforms which operate in rings or fields of integers and use modular arithmetic operations can perform operations of convolution and correlation very efficiently and without round-off errors; thus, they are well matched to the implementation of digital filters. One such transform is the new Mersenne number transform, which relax...

systems. This paper introduces a new blind watermarking technique to address the vulnerabilities of a palmprint recognition system against replay attacks. In particular, we focus on protecting the system against changing or submitting a fake palmprint image at the enrollment and/or recognition stage while still not affecting the recognition perform...

In this paper, a newly modified optimal normal basis multiplier based on the Massey-Omura method is proposed. Improvements in both area and critical path delay have been achieved over the next best architecture in the literature, through the use of pre-computation. These improvements allow for the design of small, fast multipliers for the implement...

This paper proposes a technique for automatically recognising shoeprint images for use in forensic science. The method uses the Fourier-Mellin transform to produce translation, rotation and scale invariant features. A two dimensional correlation is employed as the similarity metric for the classification process. Experiments were conducted on a dat...

Number theoretic transforms, which operate in the ring or field of integers and use modular arithmetic operations, can perform the operations of convolution and correlation efficiently and without round off errors. Thus, they are very useful for the implementation of digital filters. One such a transform is the new Mersenne number transform (NMNT)...

In this work, new structures that implement RSA cryptographic algorithm are presented. These structures are built upon a modified Montgomery modular multiplier, where the operations of multiplication and modular reductions are carried out in parallel rather than interleaved as in the traditional Montgomery multiplier. The global broadcast of data l...

The new modular multiplier structures proposed in this paper are based on a short precision magnitude comparison instead of the full magnitude comparison operation. Another feature of these structures is that the comparison operations are carried out first. Only once this has been achieved that the reduction operation takes place, while in previous...

In this paper, new structures that implement RSA cryptographic algorithm are presented. These structures are built upon a modified Montgomery modular multiplier, where the operations of multiplication and modular reduction are carried out in parallel rather than interleaved as in the traditional Montgomery multiplier. The digit approach has been ad...

Compared to traditional transforms such as the FFT and the DCT, the wavelet transform is seen rather as the framework of a transform. From this framework, different wavelets can be derived depending on the type of the basis, the number of coefficients and different other parameters. The aim of this paper to introduce methodology and an environment...

In this paper, new structures that implement RSA cryptographic algorithm are presented. These structures are built using a modified Montgomery modular multiplier, where the operations of multiplication and modular reductions are carried out in parallel rather than interleaved as in the traditional Montgomery multiplier. The global broadcast data li...

Many public key cryptographic algorithms require modular multiplication of very large operands as their core arithmetic operation. One method to perform this operation reasonably fast is to use specialised hardware. However, larger sizes are often required to increase security. This comes at the expense of either reducing the clock rate or dramatic...

FPGA technology offers the potential of designing high performance systems at low cost for certain applications including signal processing. Although the programming model, which FPGAs typically present to application developers, is prohibitively low level, they remain very good targets for rapid design prototyping and on chip testing. The purpose...

Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image processing end-user to benefit from this kind of devices, the level of design abstraction needs to be raised. This approach will help the application developer to focus on...

Traditional serial-serial multiplier structures suffer from an inefficient generation of partial products, which leads to hardware overuse and slow speed systems. In this paper, two new architectures for fully serial multiplication are presented. To the best of our knowledge, the first structure is the first fully serial multiplier reported in the...

The purpose of this paper is to present a methodology for rapid prototyping of orthonormal wavelet transforms on FPGAs. The approach takes advantage of the similarities between the forward and inverse wavelet transform structures to achieve an efficient and suitable partitioning. The designs are captured in both schematic and VHDL capture tools and...

FPGA technology offers the potential for low cost and high performance for certain applications, including signal and image processing. Although the programming model which FPGA typically present to application developers is prohibitively low level, they are good target devices for rapid prototyping. The purpose of this paper is to present a novel...

FPGA technology offers an attractive combination of low cost and high performance combined with an apparent flexibility. Although the programming model, which FPGA typically present to signal/image processing application developers, is prohibitively low-level, they remain very good target devices for rapid prototyping. The purpose of this paper is...

The purpose of this paper is to present a methodology for rapid prototyping of biorthogonal wavelet transforms on FPGAs. The methodology is based on adequate partitioning of a time interleaved "wait cycles" free architecture. The design has been captured using a schematic capture tools and can be parameterised in terms of the number of filter coeff...

Algorithms and architectures for performing modular multiplication operations are important in cryptography and Residue Number System. In this paper Montgomery's algorithm has been broken into two concurrent no-interleaved multiplication operations. The architectures derived from this algorithm are systolic and need near communication links only. T...

Although FPGA technology offers the potential of designing high performance systems at low cost for a wide range of applications, its programming model is prohibitively low level requiring either a dedicated FPGA-experienced programmer or basics digital design knowledge. To allow a signal/image processing end-user to benefit from these kind of devi...

Algorithms and architectures for performing modular multiplication operations, which is central to crypto-system and authentication schemes, are important in today's needs of secure communications. This paper presents two new iterative algorithms for modular multiplication. The implementation of these algorithms yields to scalable architectures tha...

Although FPGA technology offers the potential of designing high performance systems at low cost for a wide range of applications, its programming model is prohibitively low level requiring either a dedicated FPGA-experienced programmer or basic digital design knowledge. To allow a signal/image processing end-user to benefit from this kind of device...

Digit-serial architectures obtained using traditional unfolding and folding techniques cannot be pipelined beyond a certain level because of the presence of feedback loops. In this paper, a novel approach for the design of pipelined digit serial-parallel multipliers is presented

A new bi-directional bit serial-parallel multiplication architecture is presented. The proposed structure is regular and modular, and requires nearest neighbour communication links only, which makes it more efficient for VLSI implementation. Furthermore, a judicious deployment of latches in the circuit ensures that the multiplier operates on two co...

FPGA technology offers the potential for low cost and high performance for certain applications, including image processing. However, the programming model which FPGAs typically present to application developers is prohibitively low level. The purpose of this paper is to present a novel bit-serial architecture based on a time-interleaved structure....