Mustafa Berke Yelten

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Verified

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• PhD, NC State University Electrical Engineering, 2011
• Professor (Associate) at Istanbul Technical University

This letter presents the measurement results of a 180-nm complementary metal-oxide-semiconductor (CMOS) X-band low-noise amplifier (LNA) at both 77 and 300 K. The designed LNA provides S₁₁ and S₂₂ below -10 dB at both temperatures within 6.4-7.4 GHz band. At 300 K, the voltage gain of the designed LNA is higher than 12.5 dB, and it provides an aver...

This paper presents a 2 GHz low noise amplifier (LNA) implemented in 180 nm complementary metal oxide semiconductor (CMOS) technology designed for cryogenic temperatures as well as its measurement results at both room temperature and 77 K. A modified approach to classical LNA design has been adopted. The matching of the LNA has been performed by ex...

In this paper, a metal–oxide–semiconductor-field-effect-transistor modeling methodology for cryogenic conditions has been extensively verified through device measurements performed on a cryogenic probe station that was cooled by liquid nitrogen (−196 °C). The approach is valid for all operating regions (including the sub-threshold mode). The develo...

This paper presents a modeling approach to simulate the impact of total ionizing dose (TID) degradation on low-power analog and mixed-signal circuits. The modeling approach has been performed on 180-nm n-type metal-oxide-semiconductor field-effect transistors (n-MOSFETs). The effects of the finger number, channel geometry, and biasing voltages have...

In this paper, a tunable low noise amplifier (LNA), which provides a bandwidth of 1 GHz, has been designed. The tunability of the LNA has been achieved by employing MOS varactors in accumulation mode. A shift in the LNA performance has been observed with the change in the total capacitance of the varactors through the control voltage. Starting from...

This paper presents a machine-learning-based approach for the degradation modeling of hot carrier injection in metal-oxide-semiconductor field-effect transistors (MOSFETs). Stress measurement data have been employed at various stress conditions of both n-and p-MOSFETs with different channel geometries. Gaussian process regression algorithm is prefe...

We present a compact electromagnetically actuated 3D-printed rotary actuator for use in Scanning Capsule Endoscopy. The actuator comprises two cantilevers connected to a rotating body via nylon strings. External coils and the magnets placed on the cantilevers create an electromagnetic force with which the rotation can be initiated. Opposite coils a...

As a result of increased interest in space applications, radiation-aware circuit design has become a major concern to guarantee the safe operation of electronic systems operating under extreme space conditions. As the first step, several ad-hoc simulation approaches have been developed in analog and digital domains to estimate the functional behavi...

In this study, we showcase the design, manufacturing, and characterization of the focus adjustment actuator for use in capsule endoscopy. The actuator has a spiral flexure, carrying a lens and multiple magnets at its center to facilitate focusing through electromagnetic actuation. The interplay between the spiral flexure length and the lens size is...

This article presents a transimpedance amplifier (TIA) design suitable for 1 Gbps operation using a 4-level pulse amplitude modulation scheme. It is aimed toward communication protocols with large-area photodetectors, such as plastic-optical-fiber, visible light communications, and biomedical applications. The TIA leverages a flipped-voltage-follow...

In this study, the design of a direct down-conversion, double-balanced Gilbert Mixer at 432 MHz is presented. The proposed circuit achieves a 13.4 dB double-sideband noise figure with an associated flicker corner frequency of 250 kHz. The conversion gain of the mixer is approximately 10.2 dB, with an IIP3 of 8.2 dBm simulated in the post-layout set...

A Gilbert-cell mixer is designed for operation in cryogenic conditions (-196∘C) using UMC 180 nm CMOS technology. The operating frequency is determined as 5 GHz. The proposed mixer achieves an IIP3 of 12.8 dBm, a 1-dB compression of 2.19 dBm, and a conversion gain of around 4 dB at -196∘C. The design performance has been compared with the outcomes...

This paper focuses on designing low-power, low-noise amplifiers (LNA) performances. Different LNA topologies operating with sub-mW power consumption at 2.4 GHz have been implemented in a commercial 40 nm CMOS process. The LNA1 (cascode common source LNA) has a voltage gain of 12.22 dB, a noise figure (NF) of 4.35 dB, and a third-order input interce...

This paper presents a noise-canceling transimpedance amplifier (TIA) for plastic optical fiber (POF) and visible light communication (VLC), where large area photodetectors are common. The proposed TIA is based on the active shunt-shunt feedback topology for fast operation, and the structure is modified to improve the transimpedance (TI) gain and no...

This tutorial presents the holistic modeling concept in the context of metal-oxide-semiconductor field-effect-transistors (MOSFETs). First, the standard MOSFET modeling approaches will be comparatively discussed. Subsequently, several factors impacting the operation of MOSFETs will be explained in terms of their physical origins and their modeling,...

This paper discusses the impact of total ionizing dose (TID) on basic amplifier stages that are biased right above the device threshold voltages. Existing TID degradation-aware transistor models have been leveraged in circuit simulations. The simulation methodology is developed to account for operating currents comparable to TID-induced leakage cur...

We present a simple, low-cost and effective method to monitor mode-shapes of dynamic structures, based on laser triangulation. Through the smart adjustment of the camera view angle, we were able to acquire the mode-shapes on two orthogonal planes, without the need to change the placement of neither the device-under-test, nor the illumination or det...

In this study, a phase error correction algorithm is proposed for radio frequency (RF) energy harvesting through a fully differential RF-to-DC converter with two antennas. The system keeps one of the inputs as the reference and adjusts the phase of the other input. A 2-bit resolution is used to demonstrate how the concept works. The system aims to...

We present a novel meandered dual loop conformal antenna operated at 433 MHz ISM band for wireless capsule endoscopy. The proposed antenna provides a wide bandwidth to tolerate the resonance frequency shifts due to tissue composition changes along with the capsule movement in the gastrointestinal (GI) tract and a wide axial ratio beamwidth to enabl...

We present the design and characterization of a 3D-printed spiral actuator towards focus adjustment in endoscopes. The actuator, holding an aspherical lens, can be electromagnetically actuated to achieve ~0.5 mm displacement at 10 mW power.

This paper reports a test chip design in a commercial 40 nm process technology to characterize the level of time-based degradation in metal-oxide-semiconductor field-effect-transistors (MOSFETs). The two phenomena that have been concentrated on are the bias temperature instability (BTI) and the hot carrier injection (HCI). Stress tests have been ca...

This paper focuses on the design and validation of an analog artificial neural network. Basic building blocks of the analog ANN have been constructed in UMC 90 nm device technology. Performance metrics of the building blocks have been demonstrated through circuit simulations. The weights of the ANN have been estimated through an automated back-prop...

In this study, a low-dropout voltage regulator (LDO) system composed of two LDOs, which can operate in the temperature range of 77–400 K, has been developed. Cryogenic and typical transistor models of the 180 nm UMC CMOS process have been employed in the design process. Both LDOs can provide a load current of 100 mA while generating four different...

This paper focuses on observing the aging impact of a DC offset cancellation circuit (DCOC) on the performance of an amplifier subject to time-based degradation, also known as aging. The circuit can be activated or deactivated to reduce the offset voltage that arises due to possible mismatches between the aging transistor in an amplifier. The propo...

In optical communication systems, transimpedance amplifiers (TIAs) play a critical role as they are used in the front end of receivers to sense the optical inputs thereby converting them into electrical signals. In this paper, a low noise, high gain, and low power TIA is presented in 40 nm CMOS technology. To compensate for the low intrinsic gain o...

In this paper, we aimed to investigate the reliability of an organic light-emitting diode (OLED) and propose a SPICE compatible electrical model for automotive exterior lighting applications. The proposed model smoothly provides the forward and reverse current-voltage relation and also dynamic capacitive behavior of OLED is included in the model. T...

3D printing is a rapidly emerging low-cost, high-yield, and high-speed manufacturing technique that has already been utilized in fabricating sensor and actuator devices. Here we investigate the cyclic fatigue and the effect of heating on 10 x 10 mm2-sized, 3D-printed polyamide-based laser scanning electromagnetic actuators, which are intended for i...

In this study, a low drop-out (LDO) voltage regulator which can operate at cryogenic temperatures is designed using cryogenic transistor models of 0.18μm UMC CMOS process. The designed LDO regulator can provide a 100mA load current while generating four different digitally configurable output voltage levels (0.9V, 1.2V, 1.5V, 1.8V). The designed LD...

Cryogenic electronics has grown in its widespread use for various technological applications. Particularly, CMOS devices and circuits are more frequently used in such systems due to their dominance in the electronics industry. At cryogenic temperatures, characteristics of CMOS devices vary, which should be characterized with measurements. In this p...

In this paper, different sized NMOS devices, with the drain and gate terminals connected to 1.8 V and other terminals connected to ground potential, were irradiated. The effects of irradiation were investigated on the devices with either proper configuration of the drain and source terminals or with them reversed. Differences between the measured r...

This study demonstrates a first example of silver nanowire coated wool fibers for wearable electronic applications. Silver nanowires were synthesized according to the polyol method and then drop casted on knitted wool fabrics. Electronic properties of the knitted samples were investigated under cyclic bending conditions. Conductive fabrics were iso...

Performance of analog circuits degrades over time due to several time-dependent degradation mechanisms. Due to the increased aging problems in ever shrinking dimensions, reliability of CMOS analog circuits has become a major concern. Overdesign is a popular aging-aware circuit design approach, where circuit operation is guardbanded by choosing the...

Conventional transistor models are unable to capture the electrical behavior of transistors at cryogenic temperatures. In this paper, a methodology has been developed to calibrate temperature dependence parameters of Berkeley Short-Channel Insulated Gate Field Effect Transistor Model (BSIM3). Rather than modifying BSIM3 equations, the algorithm onl...

Özetçe-Kablosuz haberleşme uygulamaları için yüksek verimli J sınıfı çalışma modlu bir RF güç kuvvetlendiricisi (GK) tasarımı ve gerçeklenmesi bu çalışmanın odak noktasıdır. Bu çalışmada, aktif eleman olarak GaN HEMT transistör kullanarak, geniş bant J sınıfı bir güç kuvvetlendiricisi tasarımı gerçekleştirilmiştir. Tasarımda, 2.5-3.5 GHz frekans ba...

In this paper, an 8-bit successive approximation register (SAR) analog-to-digital converter (ADC) which can be operated between room temperature and 77K has been designed for transceivers which is aimed to be used in space communications. The design has been accomplished through UMC 180 nm complementary metal oxide semiconductor (CMOS) technology....

In this paper, a methodology to analyze the time dependent dielectric breakdown (TDDB) reliability of CMOS analog and radio frequency (RF) circuits has been proposed and applied to common circuit building blocks, including an operational amplifier, a RF mixer, and a comparator. The analysis includes both finding the transistors in the circuit topol...

Recent advances in the field of stereolithography based manufacturing, have led to a number of 3D-printed sensor and actuator devices, as a cost-effective and low fabrication complexity alternative to micro-electro-mechanical counterparts. Yet the reliability of such 3D-printed dynamic structures have yet to be explored. Here we perform reliability...

With the growing use of analog circuits in sensor systems for internet of things applications, estimation of their yield has become critical in order to increase the efficiency of large volume manufacturing. In this paper, a methodology to estimate the yield of analog circuits beyond 95% is proposed. The methodology is based on an algorithm that us...

This paper presents an approach to the analysis of on-chip integrated spiral inductors in terms of parametric variabilities. An enhanced single-π model is proposed to compensate for high frequency deviations. In addition to the single-π model parameters, the skin effect and the proximity effect are included in the surrogate model to reflect high fr...

In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circu...

Increased reliability problems in deep sub-micron CMOS technologies have led to a dramatic decrease of lifetime of analog integrated circuits. To palliate this problem, several reliability-aware design approaches have been developed. Reconfigurable circuit design is one of those approaches, which is based on reconfiguring the circuit considering de...

A viable technique for sensitivity analysis in high-dimensional systems is described in the context of bio-inspired systems. The sensitivity analysis provides critical information about the system by indicating the dominant parameters that shape the output. This knowledge becomes particularly essential to have a better understanding of complex biol...

Reconfigurable circuit design has become very important in the last decade for increasing the lifetime of CMOS circuits in deep sub-micron technologies. Sense & React approach is one of the reconfigurable design approaches, where degradation in a circuit performance is detected via sensor circuitry and a pre-established recovery operation is applie...

Modern integrated circuit designers must deal with complex design and simulation problems while coping with large device to device parametric variations and often imperfect information. This chapter presents surrogate model-based methods to generate circuit performance models for design, device models, and high-speed input-output (IO) buffer macrom...

Analog circuits embedded in large mixed-signal designs can fail due to unexpected process parameter excursions. To evaluate manufacturing tests in terms of their ability to detect such failures, parametric faults leading to circuit failures should be identified. This paper proposes an iterative sampling method to identify these faults in large-scal...

This paper presents surrogate model-based methods to generate circuit performance models, device models, and high-speed IO buffer macromodels. Circuit performance models are built with design parameters and parametric variations, and they can be used for fast and systematic design space exploration and yield analysis. Surrogate models of the main d...

Three nonlinear reduced-order modeling approaches are compared in a case study of circuit variability analysis for deep submicron complementary metal-oxide-semiconductor technologies where variability of the electrical characteristics of a transistor can be significantly detrimental to circuit performance. The drain currents of 65 nm N-type metal-o...

This paper describes a methodology based on reduced-order models to investigate the effects of process mismatch in analog circuits in the presence of reliability degradation. Neural network-based reduced-order models for the DC drain current, Ids, of 65 nm n- and p-channel transistors have been generated in terms of six process parameters, temperat...

Surrogate models are used in grey-box or black-box modeling of a wide variety of systems including electromagnetic modeling of complex structures, geological distributions of minerals, interaction of airflows with airfoils, chemical processes, to name just a few. Only recently have surrogate models been used explicitly in electronics. Surrogate mod...

A negative-bias-temperature-instability (NBTI) monitor subcircuit is presented and implemented in 65-nm CMOS technology. The subcircuit can be incorporated in various analog circuit blocks subject to different variability, stress, and aging histories. For an amplifier block, the NBTI monitor is a linear sensor, and sensing is provided as variation...

This paper presents a reliability simulation framework based on surrogate modeling. A novel methodology has been developed, which integrates variability analysis with the reliability concepts by employing transistor drain-current surrogate models in terms of crucial process parameters, bias voltages, temperature, and time. Simulation techniques usi...

This paper presents a reliability simulation framework based on surrogate modeling. A novel methodology has been developed, which integrates variability analysis with the reliability concepts by employing transistor drain-current surrogate models in terms of crucial process parameters, bias voltages, temperature, and time. Simulation techniques usi...

This paper presents surrogate modeling as a solution to variation-aware macromodeling, circuit design, and device modeling. A scalable and high-fidelity IO buffer macromodel is created by integrating surrogate modeling with a physically-based model structure. Circuit performance surrogate models with design and variation parameters are efficient fo...

At the nanoscale, variability of transistor process parameters and time-based reliability degradation (also called device aging) significantly impact circuit performance metrics. It is necessary to individually model the variability of each transistor in a circuit to accurately represent die-to-die and within-die variations. Traditionally, one of s...