Muhammed A. Ibrahim

Salahaddin University - Erbil | SUH · Department of Electrical Engineering

Low power and thermal design techniques are more advantageous for high-performance memory cells. Body bias is an adaptive technique used for power and thermal management in memory systems. It offers an efficient solution for the memory's power and thermal problems. In this study, a thermal management controller is presented as a complete hardware t...

The modern CPU technology scaling with increasing transistor density causes an exponential growth of both dynamic and static power dissipations that affecting the microprocessor’s performance. The body bias voltage (VBB) and supply voltage (VDD) extent to decrease to maintain the low power requirements. Joint body biasing and voltage scaling is an...

In the design of modern processors, power and thermal management have become prominent issues of portable computer systems. Dynamic threshold voltage scaling (DTVS) is an effective low-power design technique for reducing the dissipated power. The technique adjusts the body bias voltage (VBB) and, correspondingly, the threshold voltage (Vth) adaptiv...

Abstract: The rapid growth in microprocessor’s performance increases the power consumption significantly, resulting in rising microprocessor and system temperatures. High temperatures and eminent thermal variations of processors create severe challenges in system reliability, and cooling costs. Therefore, power and thermal management have become pr...

A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. Wit...

Power dissipation is a dominant aspect that limits the performance of microprocessors. In this work adaptive supply and body voltage control is used by applying optimum Vdd and NMOS-PMOS body bias voltages (VBB-N & VBB-P) to the microprocessor unit, which compensate the threshold voltage and clock frequency for ultra-low power design. SPICE simulat...

In this paper, a new voltage-mode (VM) full-wave rectifier circuit employing two plus-type differential voltage–current conveyors, two grounded resistors, and two diodes is proposed. The proposed full-wave rectifier enjoys high input impedance and low output impedance; accordingly, it is suitable for direct cascading with other VM circuits without...

efficient temperature aware design in modern microprocessors, especially in the design of digital portable, notebook, and handheld computers is becoming increasingly important. Many studies have been done on microprocessor's dynamic thermal management techniques and methodologies; from thermal estimation to voltage scaling, clock gating, and total/...

In this paper, two new circuit configurations for realizing voltage-mode (VM) all-pass sections (APSs) are presented. The proposed circuits employ only two differential voltage current conveyors (DVCCs) and are cascadable with other VM circuits due to their high-input and low-output impedances. The first configuration uses a grounded resistor and a...

In this work, we present new topologies for realizing one lossless grounded inductor and two floating, one lossless and one lossy, inductors employing a single differential difference current conveyor (DDCC) and a minimum number of passive components, two resistors, and one grounded capacitor. The floating inductors are based on ordinary dual-outpu...

In this work, we present a new topology for realizing a grounded inductor employing only a single current conveyor (CC), called modified dual-output differential difference current conveyor (MDO-DDCC), and a minimum number of passive components, two resistors, and one grounded capacitor. The non-ideality effects of the active element on the simulat...

In this paper, two new circuits for realizing first-order voltage-mode (VM) all-pass section (APS) with vari-able gain are presented. The first proposed filter uses a single differential difference current conveyor (DDCC), one grounded capacitor and three resistors. The second proposed filter consists of two DDCCs, three grounded resistors and one...

In this paper a mixed-mode (input and output signals can be current or voltage) Kerwin–Huelsman–Newcomb (KHN) biquad with low/high input impedance and high/low output impedance depending on the type of the corresponding signal (current/voltage) is presented. The circuit is constructed using three differential voltage current conveyors (DVCCs), two...

Realization of a universal filter based on dual-output operational transconductance amplifiers (DO-OTAs) working in mixed-mode, i.e., voltage-mode (VM), current-mode (CM), transimpedance-mode (TIM) and transadmittance-mode (TAM) is presented in this paper. The filter realizes the basic filter functions simultaneously in all the four possible modes....

In this paper, a new circuit for simulating a mutually coupled circuit is presented. The circuit employs four second-generation current conveyors (CCIIs) as active elements, together with five resistors and two grounded capacitors as passive elements. The values of a primary self-inductance, a secondary self-inductance and a mutual inductance can b...

In this paper, a transimpedance-mode multifunction filter is proposed. The proposed circuit employs three differential voltage current feedback amplifiers (DVCFAs) as active elements together with two capacitors and three MOS resistors, so, it's suitable for MOSFET-C Technology. The central frequency and the quality factor of the filter can be elec...

A simple topology for the realization of negative type differential difference current conveyor (DDCC-) is presented. The proposed topology is based on floating output transconductor (FOT) circuits. A CMOS realization of this type current conveyor, which is made up from floating current sources (FCS), is given. Design details and simulation results...

This paper analyzes phase locked loops (PLLs) from the noise point of view. It is important to now how different noise sources affect the noise performance of the output signal. The sources of noise may be classified into two types, the noise at input, and the noise of VCO. Since a number of performance metrics have to be taken into account simulta...

In this work, a novel general circuit configuration for realizing differential-mode first-order all-pass and second-order all-pass/notch filters with high common-mode rejection ratio (CMRR) is presented. The proposed circuit is based on a differential voltage current conveyor (DVCC). The circuit uses only one resistor and three capacitors for reali...

This paper presents a methodology for power and energy reduction in general purpose microprocessors, which is known as dynamic voltage frequency scaling (DVFS). The DVFS technique can be considered as an effective mechanism for reducing processor power and energy. In the last decade a lot of works have been done during the hardware and software imp...

In this paper, a current-mode (CM) Kerwin–Huelsman–Newcomb (KHN) biquad is proposed. The circuit employs three differential-voltage current conveyors (DVCCs) as active elements together with two capacitors and four resistors as passive elements, which all are grounded. The circuit simultaneously provides the three basic filter functions, namely ban...

In this paper, a transadmittance (TA)-type Kerwin-Huelsman-Newcomb (KHN) biquad is proposed. The proposed circuit employs four dual-output operational transadmittance amplifiers (DO-OTAs) as active elements together with two grounded capacitors as passive elements. The circuit simultaneously provides the three basic filter functions, namely bandpas...

In this paper, a new general configuration for realizing current-mode all-pass filter circuits using differential voltage current conveyor (DVCC) is proposed. The proposed configuration is composed of a DVCC and five passive admittances. However, each of the circuits extracted from the proposed configuration uses only three passive elements. As an...

Two new configurations for the design of biquad filters with high input impedance are presented. The first configuration can synthesize low-pass and high-pass filter functions according to the passive components used. The second one can synthesize a band-pass filter function. The proposed configurations employ only one differential difference curre...

In this work, a novel circuit configuration for realizing a differential voltage-mode Kerwin-Huelsman-Newcomb (KHN) biquad filter with high common-mode rejection ratio (CMRR) is presented. The proposed circuit is based on using the dual output differential difference current conveyor (DO-DDCC). The circuit uses three DO-DDCCs, two capacitors and fi...

The usefulness of the inverting-type second-generation current conveyor (ICCII) in active filter synthesis is illustrated by presenting four new configurations of first-order all-pass sections, based on a single ICCII. Two of these circuits use only two passive elements with no matching conditions. Thus, they are canonical realizations. One filter...

In this paper, a new voltage-mode Kerwin-Huelsman-Newcomb (KHN) biquadratic filter is proposed. The proposed circuit employs three differential voltage current feedback amplifiers (DVCFA) as active elements together with two capacitors and two MOS transistors. The circuit simultaneously provides the three basic filter functions, namely band-pass (B...

In this paper, a new realisation of DVCC based current-mode all-pass filter circuit is proposed. This circuit employs only one active element and three passive elements of which two are grounded. Using the proposed filter topology a new quadrature oscillator is presented as an application. SPICE simulations verify the theoretical results.

Two voltage-mode second-order filter configurations are presented. The presented configurations employ minimum number of active and passive elements, namely one differential difference current conveyor (DDCC) as active element and two capacitors and two resistors as passive elements. The proposed filters can realize the low-pass, high-pass and band...

In this paper, a new current-mode (CM) Kerwin-Huelsman-Newcomb (KHN) biquad is proposed. The proposed circuit employs three differential difference current conveyors (DVCCs) as active elements together with two capacitors and four resistors as passive elements, which all are grounded. The circuit simultaneously provides the three basic filter funct...

In this work, new circuit configurations for realizing biquadratic all-pass and notch filters - canonical in the number of active and passive elements - are presented. The proposed circuits are based on differential difference current conveyors (DDCCs) and operate in voltage-mode. The circuits use only one DDCC, two capacitors and two resistors. Th...

In this paper, a high linearity CMOS configuration for differential difference current conveyor (DDCC) is presented which is made up of high linearity input and output stages. Design tradeoffs are examined and computer simulation results using PSPICE are used to verify predictions.

In this work, a voltage-mode canonical first-order all-pass filter is presented. The filter contains only a single resistor, a single capacitor, and a single differential difference current conveyor (DDCC). No passive component-matching constraints are required. A complementary metal oxide semiconductor CMOS implementation of a DDCC is given to sim...

In this paper, a new voltage-mode (VM) Kerwin-Huelsman-Newcomb (KHN) biquad is proposed. The proposed circuit employs two differential difference current conveyors (DDCCs) as active elements together with two grounded capacitors and two grounded resistors as passive elements. Thus, it employs minimum number of passive elements. The circuit simultan...

In this paper, a tarnsadmittance (TA)-type Kerwin-Huelsman-Newcomb (KHN) biquad is proposed. The proposed circuit employs four dual-output operational transadmittance amplifiers (DO-OTAs) as active elements together with two grounded capacitors as passive elements. The circuit simultaneously provides the three basic filter functions, namely bandpas...

In this paper a very high-frequency CMOS configuration for differential difference current conveyor (DDCC) based on self-biasing complementary folded cascode (CFC) circuit is proposed. The circuit uses no additional bias voltage sources other than the two supply rails. In addition, DDCC-based four novel first order all-pass configurations are prese...

In this paper two new CMOS configurations for current-controlled conveyor (CCCII) are proposed. The proposed circuits provide good linearity, very high input impedance at port-y, high output impedance at port Z and good input/output current gain. SPICE simulation results using TUBITAK 3 μ CMOS process model are included to verify the expected value...

A CMOS inverting type second generation current conveyor 'positive' (ICCII+) is presented which is based on voltage and current mirror circuits. PSPICE simulation results of the proposed structure using 0.5 µm MIETEC CMOS process parameters show that it is suitable for wideband applications and has got a wide output current swing with small current...

In this paper, a new CMOS configuration for differential difference current conveyor (DDCC) is proposed. The proposed circuit provides good linearity, very high input impedance at port-Y, very high output impedance at port-Z, very low input impedance at port-X and very low current tracking error of I Z ..

In this paper, a new voltage scaling type digital-analog converter (DAC) circuit using only differential difference current conveyors (DDCCs) is presented. The circuit does not employ any other active or passive elements. Only biasing currents of the active element are present, thus the proposed circuit has low power consumption.