Muhammad Nawaz

• Ph.D. Fellow IET
• Principal Investigator at ABB Corporate Research

Dynamic avalanche (DA) phenomena and current filament (CF) formation are two extreme conditions observed in high-power devices, setting the maximum limit on turn-on/off current capability and di/dt in silicon (Si)-based bipolar devices. The properties of the silicon carbide (SiC) material enable devices with increased resilience for DA and CF compa...

The junction termination extension (JTE) structures for ultrahigh-voltage (UHV) devices consumes a considerable part of the semiconductor chip area. The JTE area is closely related to chip performance, process yield and ultimately device cost. The JTE lengths for UHV devices (i.e., > 30 kV) are still unknown, not visible in the scientific literatur...

Technology-based computer-aided design models have been used to predict the static and dynamic performance of ultrahigh-voltage (UHV) 4H-silicon carbide (SiC) P-i-N diodes, insulated-gate bipolar transistors (IGBTs), and gate turn- off (GTO) thyristors designed for 20–50 kV blocking voltage capability. The simulated forward voltage drops of 20–50...

The performance of theoretical ultra-high-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameter...

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the...

In this article, the static, dynamic, and short-circuit properties of 1.2-kV commercial 4H-SiC planar and trench gate metal–oxide–semiconductor field-effect transistors (MOSFETs) are compared and analyzed in a wide temperature range from 90 to 493 K. The temperature-dependent specific ON-resistance ( ${R}_{\text {sp}- \mathrm{\scriptscriptstyle ON}...

In this project, a Technology CAD (TCAD) model has been calibrated and verified against experimental data of a 15 kV silicon carbide (SiC) bipolar junction transistor (BJT). The device structure of the high voltage BJT has been implemented in the Synopsys Sentaurus TCAD simulation platform and design of experiment simulations have been performed to...

This paper presents a thorough characterization of 10 kV SiC MOSFET power modules, equipped with third-generation mosfet chips and without external free-wheeling diodes, using the inherent SiC MOSFET body-diode instead. The static performance (e.g., I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS<...

This paper provides an insight into the operational robustness of commercially available SiC MOSFET power modules, during short-circuit (SC) and unclamped inductive switching (UIS) test environments. A set of five different power modules from three vendors rated from 1.2–1.7 kV and with various current ratings have been evaluated, where the possibl...

Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature, and high ruggedness against radiation are key parameters, thanks to the exceptional material properties including lower conduction and switching losses offered by the SiC devices. Thi...

In this paper, the theoretical performance of ultra-high voltage Silicon Carbide (SiC) based devices are investigated. The SiC semiconductor device conduction power loss and switching power loss are predicted and compared with different modeling approaches, for SiC metal-oxide semiconductor field-effect transistors (MOSFETs) up to 20 kV and SiC gat...

This paper deals with static and dynamic measurements performed for silicon based hybrid IGBT power modules. Hybrid power modules were obtained from Mitsubishi with voltage rating of 1200 V and current rating of 800 A in half bridge configuration mode where silicon carbide based Schottky diodes are used as freewheeling diodes across silicon based I...

The aim of this work is to present a PSpice implementation for a well-established and compact physics-based SiC MOSFET model, including a fast, experimental-based parameter extraction procedure in a MATLAB GUI environment. The model, originally meant for single-die devices, has been used to simulate the performance of high current rating (above 100...

A simple analytical PSpice model has been developed and verified for a 4H–SiC based MOSFET power module with voltage and current ratings of 1200 V and 120 A. The analytical simulation model is a temperature dependent silicon carbide (SiC) MOSFET model that covers static and dynamic behavior, leakage current and breakdown voltage characteristics. Th...

In this paper, the static and dynamic characteristics of a 1200 V and 120 A silicon carbide (SiC) MOSFET power module has been measured, simulated and verified in the PSpice circuit simulation platform. Experimental measurements and PSpice simulations are performed to extract the technology dependent modeling parameters. The model is implemented in...

High power commercial SiC MOSFET modules have been evaluated under unclamped inductive switching (UIS) environment from the point of view of judging their failure ruggedness. The power modules with 1.7 kV/300 A and 1.2 kV/180 A rating were stressed with avalanche currents of their rated current value. One SiC MOSFET module sustained its avalanche c...

In this paper, a circuit level simulation model for SiC MOSFET power modules has been assessed. The static and dynamic characteristics of a 1.2 kV 800 A SiC MOSFET power module has been measured, simulated and verified in the PSpice circuit simulation platform. The SiC MOSFET power module is evaluated in two case studies, first where the power modu...

The characteristics of a 1200 V and 800 A bipolar junction transistor (BJT) power module has been measured, simulated and verified for the first time in the PSPICE platform. The simulation model is based on a silicon carbide (SiC) Gummel-Poon model for high power applications. The implemented model has been extended with temperature dependent equat...

This work deals with static and dynamic measurements performed for 4H-SiC based commercial MOSFETs power modules with voltage rating of 1200 V and current rating of 120 A. First results from engineering samples from Rohm show overall good confidence level that resulted in an ON-resistance of 20–30 mΩ, blocking voltage of 1300–1500 V and threshold v...

This paper deals with the development of a PSpice based evaluation platform for high power IGBT devices. The purpose of this platform is to provide useful information for the design and the assessment of converter cells for potential high power applications. An extended version of Hefner model is presented for high power, high voltage IGBTs taking...

This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2 as a gate dielectric for 4H-SiC MOSFET...

A simple analytical Spice-type model has been developed and verified for the first time for 4H-SiC-based bipolar junction transistor (BJT) power module with voltage and current rating of 1200 V and 800 A. The simulation model is based on a temperature-dependent silicon carbide (SiC) Gummel-Poon model for high-power applications. PSpice simulations...

Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature and high ruggedness against radiation are key parameters. This thanks to lower conduction and switching losses offered by the SiC devices. This paper deals with static and dynamic meas...

This paper deals with the development of a PSpice based temperature dependent modelling platform for the evaluation of silicon based IGBT power modules. The developed device modelling platform is intended to be used for the design and assessment of converter valves/cells for potential high power applications in transmission and distribution network...

In power converter design, especially in high power applications, considerable effort have been made on developing DC link capacitor with low stray inductance for the purpose of loss reduction. However, considering practical design requirement, lower stray inductance is not necessarily beneficial for the system. Study on current balancing across ca...

This paper addresses the design diagnostic study of 4H-SiC based IGBTs using two dimensional numerical computer simulations. Using identical set of physical device parameters (doping, thicknesses), simulated structure was first calibrated with the experimental data. A minority carrier life time in the drift layer of 1.0 1.6 μs and contact resistivi...

A theoretical design assessment is presented using two dimensional numerical computer aided design (TCAD) tool for 15–20 kV 4H–SiC IGBTs. Physical parameters of the layer structures such as drift layer thickness, doping in the drift layer, JFET region width and interface charges underneath the gate region are varied to predict the device performanc...

The paper deals with the development of a PSpice based modeling platform for the evaluation of 4.5 kV and 2.0 kA power IGBT modules to be used in HVDC and FACTS applications. Using PSpice, a set of device parameters (both for IGBTs and diodes) have first been extracted and verified by static and dynamic comparison of experimental data from 4.5 kV a...

In high power converter design, IGBT modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behaviour of the paralleling IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of paralleling IGBTs and the influe...

This paper presents the theoretical assessment of conversion losses for 4H-SiC based power devices over 10 kV. A set of empirical and analytical equations are developed to predict the losses at different temperatures and over wide blocking voltage range. Basic data for empirical equations in terms of RON and knee voltage of bipolar devices (i.e., I...

The influence of bulk traps in different regions of 4H-SiC bipolar junction transistors (BJTs) is investigated. The investigation is based on experimental results obtained by implanting up to 1011 cm-2 doses of helium ions in the collector region. The results indicate that implantations, creating point defect concentrations in the range of the dopi...

A simplified model for SiC Power diodes has been developed and implemented in Spice simulator in order to get the advantages of a modular and hierarchical structure that can be easily used for modeling of power semiconductor modules. The proposed approach is based on the lumped charge technique. One of the main targets for the proposed model is the...

This paper addresses and evaluates the temperature dependence performance of silicon carbide (4H-SiC) based insulated gate bipolar transistors (IGBTs) using two dimensional numerical computer aided design tool (i.e., Atlas TCAD from Silvaco). Using identical set of device physical parameters (doping, thicknesses), simulated structure was first cali...

This work deals with the design evaluation and influence of absorber doping for a-Si:H/a-SiC:H/a-SiGe:H based thin-film solar cells using a two-dimensional computer aided design (TCAD) tool. Various physical parameters of the layered structure, such as doping and thickness of the absorber layer, have been studied. For reliable device simulation wit...

Theoretical efficiency potential of GaN/InGaN/cSi tandem solar cells is investigated using two-dimensional numerical computer simulation (i.e. technology-based computer aided design tool: TCAD). With double-junction GaN/InGaN/cSi tandem design, a conversion efficiency of 27% is achieved using a 1.0 µm In0.5Ga0.5N absorber of top cell over crystalli...

We have used the Atlas device simulator within the Silvaco simulation framework to simulate high efficiency silicon based solar cells. We have focused on two different solar cell concepts that have already be shown to be compatible with large scale production and high efficiency; namely the Back-Contact Back-Junction (BC-BJ) silicon solar cell and...

A theoretical design evaluation is presented using two dimensional numerical computer aided simulations (TCAD) for aSi/aSiC/cSi based solar cells. A set of optical models (inbuilt complex refractive index models) were first evaluated for conventional cSi, p-i-n aSi and micormorph type solar cell designs using ray tracing and transfer matrix methods...

A two-dimensional numerical computer analysis for thin-film-based hydrogenated amorphous silicon (i.e. a-Si : H) solar cells is presented. A comparative performance assessment for various absorbing layers such as a-Si, a-SiGe, a-SiC, combined a-Si+a-SiGe, a-Si/a-SiGe-graded layers and tandem (tdm) design is shown. The device performance is evaluate...

A theoretical design analysis using two-dimensional numerical computer aided design tool (TCAD) is presented for 4H-SiC BJTs. Compared to conventional design, a high p-doped thin layer between the base–emitter region is effective to suppress the surface recombination between the base–emitter region. Using a surface recombination layer (SR layer of...

A theoretical design analysis using numerical two dimensional computer aided design tool (i.e., TCAD) is presented for a-Si/c-Si based heterojunction (HJ) solar cells. A set of optical beam propagation models, complex refractive index models and defect models for a-Si material implemented (in-built) in the simulation software are first evaluated fo...

Radiation hardness is tested for 4H-SiC n-p-n bipo- lar junction transistors designed for 1200-V breakdown voltage by implanting MeV protons and carbon ions at different doses and energies. The current gain is found to be a very sensitive parameter, and a fluence as low as 1 × 107 cm−2 of 10 MeV 12C can be clearly detected in the forward-output cha...

This work deals with the design evaluation of n-ZnO/p-cSi and p-ZnO/n-cSi heterojunction solar cells using two dimensional numerical computer aided design tool (TCAD). Various physical parameters of the layer structure such as doping and thickness of the ZnO and cSi layers have been studied. The device performance is evaluated by implementing speci...

This paper reports large active area (15 mm2) 4H-SiC BJTs with a low VCESAT=0.6 V at IC=20 A (JC=133 A/cm2) and an open-base breakdown voltage BVCEO=2.3 kV at T=25 °C. The corresponding room temperature specific on-resistance RSP-ON=4.5 mΩcm2 is to the authors knowledge the lowest reported value for a large area SiC BJT blocking more than 2 kV. The...

Technology computer aided design (TCAD) tools were applied in a systematic manner to gain an insight on the effect of high temperature on the operation of SiC bipolar junction transistors (BJT) and obtain useful parameters directly. Simple physical models (Schockley Read Hall recombination, Auger recombination, incomplete ionization, bandgap narrow...

SiC based BJTs have been irradiated with protons and ¹³C ions and show fairly stable electrical behavior with proton fluence up to 5×10¹⁰ p/cm^-2. Recent studies on SiC JFETs and Schottky diodes with gamma rays (⁶⁰Co) and protons reported no degradation from gamma rays up to a dose of ~6 Mrad but high ene...

This paper addresses the performance of SiC NPN Bipolar Junction Transistors (BJTs) at high and low temperature. A current gain of 50 at room temperature was obtained which decreases to 25 at 275 oC. A maximum current gain (β) of 111 has been reported at -86 oC. At low temperature (below -86 oC), the current gain drops rapidly because of carrier fr...

This paper addresses the performance of SiC NPN Bipolar Junction Transistors (BJTs) at high and low temperature. A current gain of 50 at room temperature was obtained which decreases to 25 at 275 degrees C. A maximum current gain (beta) of 111 has been reported at -86 degrees C. At low temperature (below -86 degrees C), the current gain drops rapid...

Silicon carbide (SiC) bipolar junction transistors (BJTs) are interesting candidates for high temperature and for high power applications primarily due to their low conduction losses and fast switching capability. The aim of this paper is to test and evaluate both the static and dynamic characteristics of SiC bipolar junction transistor (developed...

a b s t r a c t Using full 3D TCAD, an evaluation of process parameter space of bulk FinFET is presented from the point of view of DRAM, SRAM and I/O applications. Process and device simulations are performed with varying uniform fin doping, anti-punch implant dose and energy, fin width, fin height and gate oxide thickness. Bulk FinFET architecture...

A design evaluation is reported for multigate FETs (MuGFETs) by implementing a full process flow using a commercial three-dimensional technology CAD (TCAD) tool within the context of optimizing the device design and underlying fabrication processes. The simulation is based on and refers to the development of the SOI-based 30 nm MuGFET devices. Usin...

Stressed etch stop liners (ESL) are a common way to increase device performance. Here we investigate the layout dependent channel stress for mono- and multi-layer deposition. By means of empirical pseudopotential method full band structures are calculated and based on full band Boltzmann equation mobilities are extracted. We present for the first t...

Full 3D numerical process and device simulations have been performed in order to optimize device design of multigate FETs (MuGFETs) and the underlying fabrication processes. At first process simulation parameters have been calibrated to measurement data of pre-development process results. Based on this, device electrical performance has been assess...

This work deals with the junction and channel optimization on FinFET devices. The main objective was to show feasibility of a three-dimensional (3D) process simulation within the context of optimization of the device design and the underlying fabrication processes. The 3D simulation process flow is based on the development of the SOI based FinFET d...

A charge conserving capacitance model for GaAs MESFETs for Computer Aided Design (CAD) applications is presented. Simple analytical expressions for node charges were developed by integrating the sheet charge density over the gate length, which guarantees the charge conservation. The capacitances were defined by taking derivatives of the charges wit...

This work presents a theoretical design analysis of halo implants for n-MuGFETs using commercial three-dimensional (3D) TCAD simulation tool. The main objective was to show feasibility of a three-dimensional (3D) process simulation within the context of optimization of the device design and the underlying fabrication processes. The D simulation pro...

This paper targets to show feasibility of a three-dimensional process simulation flow in the context of optimization of the device design and the underlying fabrication processes. The simulation is based on and refers to the development of the SOI-based 30 nm FinFET devices. The major goal of the simulation work is to implement a complete FinFET pr...

Aggressive scaling of bulk MOS device dimensions has been the major contributor driving improvements in integrated circuit performance. Due to limitations on gate oxide thickness, and source/drain junction depth, further scaling of MOSFET devices in the sub-50 nm process generation will be difficult, if not impossible. New device architecture and n...

A theoretical design evaluation based on a hydrodynamic transport simulation of strained Si-SiGe on insulator (SSOI) type nMOSFETs is reported. Although, the net performance improvement is quite limited by the short channel effects, simulation results clearly show that the strained Si-SiGe type nMOSFETs are well-suited for gate lengths down to 20 n...

First Page of the Article

The potential of the MOVPE growth process for millimeter and submillimeter wave generation and amplifica-tion is presented. The increase in layer quality, the improved homogeneity and purity, the precision of mono-layers growth and wide spectrum III-V compounds makes MOVPE tech-niques very attractive for modern device applications. The characterisa...

A theoretical design evaluation of a GaAs/GaInAs/GaInP-based 980 nm pump laser is presented. Using self-consistent two-dimensional numerical simulation, the layer structure of the laser diodes is optimized. A ridge waveguide design with GaInAs/GaAs and GaInAs/GaInAsP waveguide regions has been simulated. Compared to multiple quantum wells, a single...

Using self-consistent two dimensional numerical simulation (LASTIP), the layer structure of the laser diodes is optimized. A ridge waveguide structure with GaInAs/GaAs and GaInAs/GaInAsP active regions has been simulated. The influence of the well numbers and waveguide thicknesses on the threshold current is studied. Compared to GaInAs/GaAs, GaInAs...

This paper presents the fabrication, experimental characterization and modeling of 0.15 μm gate-length lattice matched MODFETs based on InP technology. The variation of the drain noise temperature of the Pospieszalski model (T_D) with the applied bias has been investigated under very low power consumption conditions, and a noticeably comp...

We report on the low-frequency noise (LFN) of InP HFETs based on MOCVD- and MBE-grown materials. The spectral density of the drain current fluctuations was found to be close to 1/f with no dominating superimposed generation-recombination component. In order to avoid a non-uniform electron distribution under the gate, the measurements were performed...

We report on design, processing and characterization of AlGaAs/InGaAs/GaAs HFETs which feature the power capabilities of double delta-doped devices and the low noise performance of the standard HFETs. To study the influence of delta doping position on the subband energies and sheet charge density, numerical simulations based on a self-consistent so...

The layer structures of high electron mobility transistors (HEMTs) have been characterized by photoluminescence (PL), X-ray diffraction (XRD) and secondary ion mass spectrometry (SIMS) techniques. For the low voltage applications in mind, single and double delta-doped lattice matched HEMT devices have been processed and dc and RF performance is rep...

The potential of the MOVPE growth process for millimeter and submillimeter wave generation and amplification is presented. The increase in layer quality, the improved homogeneity and purity, the precision of mono-layers growth and wide spectrum III-V compounds makes MOVPE techniques very attractive for modern device applications. The characterisati...

We report on MOCVD grown single delta doped AlInAs/GaInAs/InP HEMTs. The devices' small-signal behavior at room and cryogenic temperatures were evaluated. It is found that HEMTs with a thin InP top surface layer provide high threshold voltage uniformity, and less thermal stress degradation compared to conventional AlInAs/GaInAs/InP HEMTs. Furthermo...

We report on hot electron stress measurements on 0.14 μm MOCVD grown AlInAs/GaInAs/InP HEMTs. The stress measurements increase the drain-source current and hence induce a temporary negative shift in the threshold voltage in unpassivated HEMTs. A permanent negative shift in the threshold voltage has been obtained in passivated HEMTs. The observed de...

The layer structures of single and double delta-doped lattice-matched MOCVD-grown modulation-doped field effect transistors (MODFETs) have been characterized by photoluminescence (PL), x-ray diffraction (XRD) and secondary ion mass spectrometry (SIMS) techniques. MODFET devices are processed and their dc and RF results are reported. At a drain-sour...

We report on the microwave performance and reliability evaluation of AlInAs/GaInAs/InP HEMTs with InP as a top surface layer grown by MOCVD. It is found that HEMTs with thin InP surface layers provide high threshold voltage uniformity, and less thermal and bias stress degradation compared to conventional AlInAs/GaInAs/InP HEMTs. A cutoff frequency...

An analytical charge control model for double delta doped high electron mobility transistors (HEMTs) is presented. Simple analytical expressions are developed for the dependence of the sheet charge density on gate bias at the top and bottom channel inside the quantum well. The validity of the developed model has been tested with numerical calculati...

We report on the reliability evaluation of MOCVD grown single and double delta doped AlInAs-GaInAs-InP HEMTs. It is found that HEMTs with thin InP top surface layer provide high threshold voltage uniformity, and less thermal stress degradation compared to conventional AlInAs-GaInAs-InP HEMTs. Furthermore, hot electron stress measurements have been...

A novel, fast and reliable process for making T-shaped gates has been developed. It uses two PMMA layers and one PMGI resist layer which have completely selective developers that result in a large process window. Using this process scheme, gate lengths from 60 to 200 nm have easily been made in the same process step. The processed InP-HEMTs show ex...

We have developed an 'in-house' MMIC process based on a microstrip InP HEMT technology for millimeter wave applications. The process includes InP-HEMT transistors with a cutoff frequency f(T) of 103 GHz, maximum frequency f(max) of 290 GHz, microstrip transmission lines, ground via holes, and mesa resistors. The performance of the transistors are d...

We present a new analytical charge conserving capacitance model for high electron mobility transistors (HEMTs) based on the quasi-static approximation and a proper partitioning of the channel charge between the source and the drain terminals. Simple analytical expressions for three terminal charges (Qg, Qd, and Qs) were derived by integrating the s...

We report on the design and characterization of pseudomorphic high-electron-mobility transistors for linear power applications. Compared to a conventional single heterojunction, the double-heterojunction PHEMT shows a flat transconductance of >200 mS/mm over a wide gate bias swing. A high breakdown voltage of 15 V was measured. A flat cutoff freque...

A new analytical charge conserving capacitance model for High Electron Mobility Transistors (HEMTs) is presented. The model is based on the quasi-static approximation and a proper partitioning of the channel charge between the source and the drain terminals. The three terminal charges were calculated by integrating the sheet charge density over the...

We present a new charge conserving capacitance model for Gallium-Arsenide (GaAs) metal semiconductor field effect transistors (MESFET's) based on the quasi-static approximation and a proper partitioning of the channel charge between the source and the drain terminals. A total of nine so-called transcapacitances were determined by taking derivatives...

Numerical results based on a self-consistent solution of Poisson's and Schrődinger's equations for GaAsAlGaAs quantum well HEMTs are presented. It is shown that varying the acceptor density in a quantum well significantly affects the threshold voltage, the channel charge density, and hence the drain current. Particularly, near threshold and the sub...

We have studied horizontal and vertical scaling properties of AlGaAMn/InGaAs/GaAs and AlInAs/InGaAs/InP based Pseudomorphic High Electron Mobility Transistors (PHEMTs) using self-consistent numerical simulations and Computer Aided Design (CAD) program HELENA. The dependence and limitation of small signal parameters on geometrical and physical param...

The numerical calculations based on a self-consistent solution of Poisson's and Schrodinger's equations for GaAs/AlGaAs double heterojunction HEMTs are presented. it is shown that varying the acceptor concentration in a quantum well influences significantly threshold voltage, drain current and other small signal parameters. For a given gate bias, v...

Design criteria of active phase shifters based on GaAs/AlGaAs multichannel (MC) HFET in the frequency range 4-60 GHz are presented. The phase characteristics of MCHFET devices were studied using the computer aided design program TOUCHSTONE. The dependence of transmission phase on various intrinsic elements in the equivalent circuit model as a funct...

We present a theoretical evaluation of the potential of dual-gate GaAs/AlGaAs multiple-quantum-well heterojunction field effect transistors (MQWHFETs) for active phase shifters in the frequency range 4–60 GHz. The computer-aided design program TOUCHSTONE was used to study the phase-shift characteristics. The transmission phase of a dual-gate MQWHFE...

We have developed an analytical charge control model for GaAs/AlGaAs multiple-quantum-well (MQW-) based high-electron-mobility transistors. The validity of the developed model was tested with numerical calculations based on self-consistent solutions of Poisson and Schrödinger equations. Excellent agreement was achieved with both numerical calculati...