Marco Platzner

Marco Platzner
Universität Paderborn | UPB · Department of Computer Science

About

209
Publications
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3,025
Citations

Publications

Publications (209)
Preprint
Full-text available
Many applications from the robotics domain can benefit from FPGA acceleration. A corresponding key question is how to integrate hardware accelerators into software-centric robotics programming environments. Recently, several approaches have demonstrated hardware acceleration for the robot operating system (ROS), the dominant programming environment...
Article
Full-text available
Verification of software and processor hardware usually proceeds separately, software analysis relying on the correctness of processors executing machine instructions. This assumption is valid as long as the software runs on standard CPUs that have been extensively validated and are in wide use. However, for processors exploiting custom instruction...
Preprint
Full-text available
Robotics applications process large amounts of data in real-time and require compute platforms that provide high performance and energy-efficiency. FPGAs are well-suited for many of these applications, but there is a reluctance in the robotics community to use hardware acceleration due to increased design complexity and a lack of consistent program...
Chapter
Fine-grained reconfigurable FPGA overlays, usually called virtual FPGAs, suffer from virtualization costs regarding area requirements and timing performance. Decreasing the area costs of such virtual FPGAs has been the focus of several research efforts over the past years, but adapting the (virtual) timing suffers from the contradiction of having t...
Article
Full-text available
Background Hand amputation can have a truly debilitating impact on the life of the affected person. A multifunctional myoelectric prosthesis controlled using pattern classification can be used to restore some of the lost motor abilities. However, learning to control an advanced prosthesis can be a challenging task, but virtual and augmented reality...
Conference Paper
Full-text available
The battle of developing hardware Trojans and corresponding countermeasures has taken adversaries towards ingenious ways of compromising hardware designs by circumventing even advanced testing and verification methods. Besides conventional methods of inserting Trojans into a design by a malicious entity, the design flow for field-programmable gate...
Chapter
Reconfigurable caches offer an intriguing opportunity to tailor cache behavior to applications for better run-times and energy consumptions. While one may adapt structural cache parameters such as cache and block sizes, we adapt the memory-address-to-cache-index mapping function to the needs of an application. Using a LEON3 embedded multi-core proc...
Conference Paper
Mobile robotics applications process large amounts of data in real-time and require compute platforms that provide high performance and energy-efficiency. FPGAs are well-suited for many of these applications, but there is a reluctance in the robotics community to use hardware acceleration due to increased design complexity and a lack of consistent...
Conference Paper
Automated synthesis of approximate circuits via functional approximations is of prominent importance to provide efficiency in energy, runtime, and chip area required to execute an application. Approximate circuits are usually obtained either through analytical approximation methods leveraging approximate transformations such as bit-width scaling or...
Article
Approximate circuits (AxCs) tradeoff computational accuracy against improvements in hardware area, delay, or energy consumption. IP core vendors who wish to create such circuits need to convince consumers of the resulting approximation quality. As a solution, we propose proof-carrying AxCs. The vendor creates an approximate IP core together with a...
Article
Reconfigurable caches offer an intriguing opportunity to tailor cache behavior to applications for better run-times and energy consumptions. While one may adapt structural cache parameters such as cache and block sizes, we adapt the memory-address-to-cache-index mapping function to the needs of an application. Using a LEON3 embedded multi-core proc...
Article
Full-text available
Radiation tolerance in FPGAs is an important field of research particularly for reliable computation in electronics used in aerospace and satellite missions. The motivation behind this research is the degradation of reliability in FPGA hardware due to single-event effects caused by radiation particles. Redundancy is a commonly used technique to enh...
Chapter
Executing real-time tasks on dynamically reconfigurable FPGAs requires us to solve the challenges of scheduling and placement. In the past, many approaches have been presented to address these challenges. Still, most of them rely on idealized assumptions about the reconfigurability of FPGAs and the capabilities of commercial tool flows. In our work...
Article
Full-text available
Modern Boolean satisfiability solvers can emit proofs of unsatisfiability. There is substantial interest in being able to verify such proofs and also in using them for further computations. In this paper, we present an FPGA accelerator for checking resolution proofs, a popular proof format. Our accelerator exploits parallelism at the low level by i...
Article
Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their compa...
Conference Paper
State-of-the-art frameworks for generating approximate circuits automatically explore the search space in an iterative process - often greedily. Synthesis and verification processes are invoked in each iteration to evaluate the found solutions and to guide the search algorithm. As a result, a large number of approximate circuits is subjected to ana...
Conference Paper
Full-text available
Reconfigurable hardware has received considerable attention as a platform that enables dynamic hardware updates and thus is able to adapt new configurations at runtime. However, due to their dynamic nature, e.g., field-programmable gate arrays (FPGA) are subject to a constant possibility of attacks, since each new configuration might be compromised...
Conference Paper
Approximate computing has become a very popular design strategy that exploits error resilient computations to achieve higher performance and energy efficiency. Automated synthesis of approximate circuits is performed via functional approximation, in which various parts of the target circuit are extensively examined with a library of approximate com...
Article
Advances in electromyographic (EMG) sensor technology and machine learning algorithms have led to an increased research effort into high density EMG-based pattern recognition methods for prosthesis control. With the goal set on an autonomous multi-movement prosthesis capable of performing training and classification of an amputee's EMG signals, the...
Presentation
Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their compa...
Chapter
This work investigates the effects of the periodization of local and global multi-objective search algorithms. We rely on a model for periodization and define a multi-objective evolutionary algorithm adopting concepts from Evolutionary Strategies and NSGAII. We show that our method excels for the evolution of digital circuits on the Cartesian Genet...
Article
Proof-carrying hardware (PCH) is a principle for achieving safety for dynamically reconfigurable hardware systems. The producer of a hardware module spends huge effort when creating a proof for a safety policy. The proof is then transferred as a certificate together with the configuration bitstream to the consumer of the hardware module, who can qu...
Article
The reliability of FPGA based hardware designs has become an important field of research particularly for space computing. Traditionally, redundancy is utilized in FPGA based designs to achieve reliable or error-tolerant computing. However, the redundant designs vary according to the granularity level and the voter placement algorithms used for the...
Article
A summary of contributions made by significant papers from the first 25 years of the Field-Programmable Logic and Applications conference (FPL) is presented. The 27 papers chosen represent those which have most strongly influenced theory and practice in the field.
Conference Paper
In this extended abstract, we briefly survey the vision and goals of On-The-Fly (OTF) computing. Then we turn to heterogeneous multi-cores which, as platforms for OTF computing scenarios, have to support a high dynamics in both the workload and the system state. We argue that concepts and models of self-awareness studied in, for example, psychology...
Chapter
Designing and operating computing and communication systems are becoming increasingly challenging tasks, due to a multitude of reasons. First, compute nodes are evolving towards parallel and heterogeneous architectures to realise performance gains while minimising their power consumption. Progress in micro(nano)- electronics allows us to integrate...
Chapter
In this book we have argued that in order to deal with the complexities of future computing systems, including size, decentralisation, uncertainty, dynamics and heterogeneity, greater levels of self-awareness on the part of such systems will be important. While this has long been agreed in principle, only now have we begun to establish a principled...
Chapter
Full-text available
Many modern compute nodes are heterogeneous multi-cores that integrate several CPU cores with fixed function or reconfigurable hardware cores. Such systems need to adapt task scheduling and mapping to optimise for performance and energy under varying workloads and, increasingly important, for thermal and fault management and are thus relevant targe...
Conference Paper
Deep Convolutional Neural Networks have revolutionized Computer Go. Large networks have emerged as state-of-the-art models for move prediction and are used not only as stand-alone players but also inside Monte Carlo Tree Search to select and bias moves. Using neural networks inside the tree search is a challenge due to their slow execution time eve...
Chapter
Full-text available
In this chapter, we present an introduction to the ReconOS operating system for reconfigurable computing. ReconOS offers a unified multi-threaded programming model and operating system services for threads executing in software and threads mapped to reconfigurable hardware. By supporting standard POSIX operating system functions for both software a...
Article
Monte-Carlo Tree Search evaluates positions with the help of a playout policy. If the playout policy evaluates a position wrong then there are cases where the tree search has difficulties to find the correct move due to the large search space. This paper explores adaptive playout policies which improve the playout policy during a tree search. With...
Article
Virtual field programmable gate arrays (FPGA) are overlay architectures realized on top of physical FPGAs. They are proposed to enhance or abstract away from the physical FPGA for experimenting with novel architectures and design tool flows. In this paper, we present an embedding of a ZUMA-based virtual FPGA fabric into a complete configurable syst...
Book
Taking inspiration from self-awareness in humans, this book introduces the new notion of computational self-awareness as a fundamental concept for designing and operating computing systems. The basic ability of such self-aware computing systems is to collect information about their state and progress, learning and maintaining models containing know...
Conference Paper
Monte-Carlo Tree Search evaluates positions with the help of a playout policy. If the playout policy evaluates a position wrong then there are cases where the tree-search has difficulties to find the correct move due to the large search-space. This paper explores adaptive playout-policies which improve the playout-policy during a tree-search. With...
Conference Paper
Proof-carrying hardware is an approach that has recently been proposed for the efficient verification of reconfigurable modules. We present an application of proof-carrying hardware to guarantee the correct functionality of dynamically reconfigured image processing modules. Our prototype comprises a reconfigurable-system-on-chip with an embedded vi...
Article
Ensuring memory access security is a challenge for reconfigurable systems with multiple cores. Previous work introduced access monitors attached to the memory subsystem to ensure that the cores adhere to pre-defined protocols when accessing memory. In this paper, we combine access monitors with a formal runtime verification technique known as proof...
Article
Virtual FPGAs are overlay architectures realized on top of physical FPGAs. They are proposed to enhance or abstract away from the physical FPGA for experimenting with novel architectures and design tool flows. In this paper, we present an embedding of a ZUMA-based virtual FPGA fabric into a complete configurable system-on-chip. Such an embedding is...
Article
The reconfigurable mesh is a parallel model of computation, which exploits a massive amount of rather simple processing elements connected through a reconfigurable interconnection network. During the last decades, the model received strong interest and many researchers have devised algorithms for it. However, most of this work focuses on theoretica...
Article
With ever-decreasing CMOS transistor sizes, integrated circuits are becoming more and more susceptible to errors. A commonly used approach to improve the reliability of digital circuits is triple modular redundancy (TMR). TMR instantiates three copies of a circuit plus additional voter circuits to take majority decisions on the output values. Prior...
Conference Paper
Full-text available
Monitoring applications at run-time and evaluating the recorded statistical data of the underlying micro architecture is one of the key aspects required by many hardware architects and system designers as well as high-performance software developers. To fulfill this requirement, most modern CPUs for High Performance Computing have been equipped wit...
Conference Paper
With increasing error-proneness of nano-circuits, a number of fault-tolerance approaches are presented in the literature to enhance circuit reliability. The evaluation of the effectiveness of fault-tolerant circuit structures remains a challenge. An analytical model is required to provide exact figures of reliability of a circuit design, to be able...
Article
Full-text available
In this paper we introduce 'On-The-Fly Computing', our vision of future IT services that will be provided by assembling modular software components available on world-wide markets. After suitable components have been found, they are automatically integrated, configured and brought to execution in an On-The-Fly Compute Center. We envision that these...
Conference Paper
Verification of hardware and software usually proceeds separately, software analysis relying on the correctness of processors executing instructions. This assumption is valid as long as the software runs on standard CPUs that have been extensively validated and are in wide use. However, for processors exploiting custom instruction set extensions to...
Article
Even small changes of electrode recording sites after training a classifier heavily influence robustness and usability of traditional pattern recognition-based myoelectric control schemes. This effect occurs during donning and doffing of the prosthesis or when changing the arm position and generally leads to a significant decrease of classification...
Conference Paper
In Monte Carlo Tree Search often extra knowledge in form of patterns is used to guide the search and improve the playouts. Shape patterns, which are frequently used in Computer Go, do not describe tactical situations well, so that this knowledge has to be added manually. This is a tedious process which cannot be avoided as it leads to big improveme...
Conference Paper
A frequently mentioned limitation of Monte-Carlo Tree Search (MCTS) based Go programs is their inability to recognize and adequately handle capturing races, also known as semeai, especially when many of them appear simultaneously. The inability essentially stems from the fact that certain group status evaluations require deep lines of correct tacti...
Article
Full-text available
Self-aware computing is a paradigm for structuring and simplifying the design and operation of computing systems that face unprecedented levels of system dynamics and thus require novel forms of adaptivity. The generality of the paradigm makes it applicable to many types of computing systems and, previously, researchers started to introduce concept...
Conference Paper
Dynamic thread duplication is a known redundancy technique for multi-cores. The approach duplicates a thread under observation for some time period and compares the signatures of the two threads to detect errors. Hybrid multi-cores, typically implemented on platform FPGAs, enable the unique option of running the thread under observation and its cop...
Conference Paper
Full-text available
This paper presents the first steps towards the implementation of an evolvable and self-adaptable processor cache. The implemented system consists of a run-time reconfigurable memory-to-cache address mapping engine embedded into the split level one cache of a Leon3 SPARC processor as well as of an measurement infrastructure able to profile microarc...
Article
Full-text available
The ReconOS operating system for reconfigurable computing offers a unified multithreaded programming model and OS services for threads executing in software and threads mapped to reconfigurable hardware. The OS interface lets hardware threads interact with software threads using well-known mechanisms such as semaphores, mutexes, condition variables...
Article
Monte-Carlo Tree Search (MCTS) has brought about great success regarding the evaluation of stochastic and deterministic games in recent years. We present and empirically analyze a data-driven parallelization approach for MCTS targeting large HPC clusters with Infiniband interconnect. Our implementation is based on OpenMPI and makes extensive use of...
Article
Full-text available
Due to the continuously shrinking device structures and increasing densities of FPGAs, thermal aspects have become the new focus for many research projects over the last years. Most researchers rely on temperature simulations to evaluate their novel thermal management techniques. However, these temperature simulations require a high computational e...
Conference Paper
The reliability of FPGA based hardware designs is becoming a challenge with future device technologies and, in particular, for avionic and space applications where FPGAs might get exposed to high radiation levels. Typically, redundancy-based techniques are used to achieve fault-tolerant operation. However, hardware redundancy comes with an overhead...
Article
Pattern recognition of myoelectric signals in upper-limb prosthesis control has been subject to intense research for several years. However, few systems have yet been successfully clinically implemented. One possible explanation for this discrepancy is that published reports mostly focus on classification accuracy of myoelectric signals recorded un...
Article
Full-text available
Evolvable hardware (EHW) has shown itself to be a promising approach for prosthetic hand controllers. Besides competitive classification performance, EHW classifiers offer self-adaptation, fast training, and a compact implementation. However, EHW classifiers have not yet been sufficiently compared to state-of-the-art conventional classifiers. In th...