Mamata Dalui

• PhD
• Professor (Assistant) at National Institute of Technology Durgapur, Durgapur, WB, India

Anaemia, a condition characterised by reduced haemoglobin levels, exerts a significant global impact, affecting billions of individuals worldwide. According to data from the World Health Organisation (WHO), India exhibits notably high anaemia prevalence in comparison to other developing nations. The urgency arises for the development of non-invasiv...

Cellular automaton (CA) is a computing model which is emerging rapidly. It is largely used in different types of scientific applications and simulations due to its ability to solve complex problems using simple rule(s). Cellular automata (CAs) are used in different types of applications like cryptography, VLSI systems, fault detection, etc. Typical...

In the era of advanced communication technology, security of confidential data during transmission through public media is an important issue. To curtail the risk of attacks, a secured, reversible, robust data concealing scheme with good visual quality and embedding capacity is essential while improving execution efficacy. In this context, a Cellul...

In the area of data hiding and information security, the greater need is to ensure high embedding capacity of the stego media without hampering the visual quality while ensuring the tightest possible security. Now, it has become one of the biggest challenge to meet all these requirements. Embedding secret messages in dual images is one of the lates...

Cognitive load (CL) refers to the amount of mental effort and resources required to complete a task or solve a problem. Capacity of the working memory has an impact on children’s education. It is challenging to measure the cognitive load of children required to solve the learning tasks. Assessing the workload of a particular problem or task can hel...

Human gender classification based on biometric features is a major concern for computer vision due to its vast variety of applications. The human ear is popular among researchers as a soft biometric trait, because it is less affected by age or changing circumstances, and is non-intrusive. In this study, we have developed a deep convolutional neural...

Human gender classification based on biometric features is a major concern for computer vision due to its vast variety of applications. The human ear is popular among researchers as a soft biometric trait, because it is less affected by age or changing circumstances and is non-intrusive. In this study, we have developed a deep convolutional neural...

Compression techniques can be used on digital content to minimize duplication and maintain internet traffic, while ensuring the quality of the decoded object. Two functionalities such as data concealing and images compression can be combined into a single module, reducing the risk of responder attacks while improving execution efficacy. This study...

Anaemia, caused due to lack of blood haemoglobin levels, is one of the most common diseases which affects billions of people across the world. According to WHO statistics, India is one of the developing countries with highest prevalence of anaemia. Conventional invasive methods are cost-prohibitive and difficult to administer globally which essenti...

Functional near infrared spectroscopy (fNIRS) is a non-invasive tool for monitoring functional brain activation that records changes in oxygenated hemoglobin (HbO) and deoxygenated hemoglobin (HbR) concentrations. fNIRS is well accepted in the cognitive study where the signals are intended to measure cognitive load in the human brain. Concentration...

Anaemia, caused due to lack of blood haemoglobin level, is one of the most common diseases that affects billions of people across the world. According to WHO statistics, India is one of the developing countries with highest prevalence of anaemia. Conventional invasive methods are cost-prohibitive and difficult to administer globally which essential...

Cellular Automata (CAs) are considered as a powerful mathematical modelling tool that is becoming more popular in scientific research and simulations. The potential of CAs to represent a broad range of physical, natural, and real-world events has grabbed the attention of researchers from a wide range of domains. Three-neighbourhood one-dimensional...

Cellular automata (CAs) are simple mathematical models that are effectively being used to analyze and understand the behavior of complex systems. Researchers from a wide range of fields are interested in CAs due to their potential for representing a variety of physical, natural and real-world phenomena. Three-neighborhood one-dimensional CAs, a spe...

Estimation of blood haemoglobin level is essential for evaluating health condition related to anaemia and its associated diseases. The invasive way of haemoglobin estimation is costly as well as it needs trained professionals along with a good infrastructural and administrative support. Due to the lack of specialized equipment, trained professional...

When the secret message is placed inside a highly compressed image, the transmission will be more secure and cost efficient. In this article, two-layer data embedding and extraction approaches are provided that use a combination ofAbsolute Moment Block Truncation Coding (AMBTC) and Difference Expansion (DE) to enhance hiding capacity on a large sca...

This work reports characterization of one-dimensional null-boundary cellular automata (CA) rules in 3-neighborhood. The outcome of this characterization is the identification of CA rules that are the probable candidates for producing single length cycle attractor (fixed point). It targets synthesis of CA with only one fixed point (referred to as th...

COVID-19 is a deadly and highly infectious pneumonia type disease. RT-PCR is a proven testing methodology for the detection of coronavirus infection in spite of having a lengthy testing time. Sometimes, it gives false-positive results more than the desired rates. To support the conventional RT-PCR methodology or testing independently without RC-PCR...

Cellular Automata (CA) is a discrete model that is increasingly being employed in scientific study and simulations. It has several applications in the domains such as VLSI design, error-correcting codes, test pattern generation, and cryptography, etc. The majority of these applications make use of three-neighbourhood 1-dimensional CA. In this work,...

This paper proposes the synthesis of single length cycle, single attractor cellular automata (SACAs) for arbitrary length. The n-cell single length cycle, single attractor cellular automaton (SACA), synthesized in linear time O(n), generates a pattern and finally settles to a point state called the single length cycle attractor state. An analytical...

Unlike image restoration, image enhancement techniques are found to be subjective in nature as the appearance of an output image depends upon human perception. Hence, it is very difficult to determine the appropriateness of image enhancement techniques including edge detection operators prior to an application. This paper makes use of regression mo...

In the integrated circuits (ICs) life cycle, malicious modifications of system components in the design houses or foundries have emerged as a major security threat and is popularly known as Hardware Trojan attacks. In general, such Hardware Trojans are very stealthy in nature and are therefore, very difficult to detect, even during the manufacturin...

COVID-19 is posed as very infectious and deadly pneumonia type disease until recent time. Despite having lengthy testing time, RT-PCR is a proven testing methodology to detect coronavirus infection. Sometimes, it might give more false positive and false negative results than the desired rates. Therefore, to assist the traditional RT-PCR methodology...

Nowadays, Hardware Trojan threats have become inevitable due to the growing complexities of Integrated Circuits (ICs) as well as the current trend of Intellectual Property (IP) based hardware designs. An adversary can insert a Hardware Trojan during any of its life cycle phases-during the design, fabrication or even manufacturing phase. Once a Troj...

Nowadays, Hardware Trojan threats have become inevitable due to the growing complexities of Integrated Circuits (ICs) as well as the current trend of Intellectual Property (IP)-based hardware designs. An adversary can insert a Hardware Trojan during any of its life cycle phases — the design, fabrication or even at manufacturing phase. Once a Trojan...

Pre-bond testing of through silicon vias (TSVs) in 3D ICs is very challenging task. Reliability and correctness of 3D ICs consisting of numbers of TSVs have to be established. This paper presents an innovative pre-bond test method for TSVs in a 3D IC. The logic is devised around the cascadable arrangement of Cellular Automata (CA), discovered by vo...

Due to the growing complexities of Integrated Circuits (ICs) and the current trend of Intellectual Property (IP) based hardware designs, the possible threats of Hardware Trojans are inevitable. Trojans can be inserted during the design or fabrication phase of the IC design cycle by an untrustworthy third party. A Trojan once implanted in a system c...

To provide high vertical interconnection density between device tiers, Through Silicon Via (TSV) offers a promising solution in 3D caches. It reduces the length of global interconnection and ensures high speed cache memory access. Maintaining coherency of shared data in such caches is, however, very crucial and, therefore, demands that the reliabil...

The embedded system-on-a-chip (SoC), that integrates heterogeneous processors with variation in coherence protocol, adds complexity in maintaining coherency in the data caches. It further complicates the task of coherence verification in such systems. This work targets effective solution for coherence verification in heterogeneous chip multiprocess...

Built-in-self-test (BIST) in memory is considered as most cost effective method for memory testing. In this work, we propose a cellular automata (CA) based BIST architecture to detect neighborhood pattern sensitive faults (NPSFs) in high speed memories. For implementation of the proposed CABIST, we employ 5-neighborhood periodic boundary CA (PBCA)....

The main reason for low efficiency of data cache in chip-multiprocessors (CMPs) is the presence of dead blocks that are not accessed for a long time before eviction. The design inaccuracies degrade the performance of a system and cause huge power drainage. This demands effective prediction scheme for the early detection of dead block. This work, th...

In a Chip Multiprocessors (CMPs) with large number of cores, directory size increases linearly with number of sharers. To over-come the shortcomings of flat directory structures, hierarchical directory structures are used. An insignificant fault in the sharer set representation of such a directory may introduce major inconsistency throughout the sy...

This work reports an effective design of protocol processor (PP), the key component of coherence controller, in a Chip Multiprocessors (CMPs) cache system. It caters to the need for determining the state of a data block in processors' private caches with high accuracy. An insignificant defect in the PP can introduce major inconsistencies in computi...

This work reports a highly accurate test structure for high speed memories. The theoretical bases of the design are the March algorithm and cellular automata (CA) proposed by von Neumann in 1950s. Theory of 3 and 5-neighborhood CA, employed for the current application, has been developed to enhance the self-testability of memory test logic. The spe...

This work reports an effective design of cache system for Chip Multiprocessors (CMPs). It introduces built-in logic for verification of cache coherence in CMPs realizing directory based protocol. It is developed around the cellular automata (CA) machine, invented by John von Neumann in the 1950s. A special class of CA referred to as single length c...

In embedded system-on-a-chip (SoC) applications, the demand for integration of heterogeneous processors on a single chip is increasing. It adds complexity in maintaining coherency in data caches of the heterogeneous processors implementing different coherence protocols. Therefore, the task of coherence verification also becomes non-trivial for such...

The protocol processor (PP) is a key component of the cache coherence controller (CC) in a Chip Multiprocessors (CMPs) cache system. PP computes the state of a block on every transaction (read/write operation) on the block while maintaining cache coherence in CMPs. This work proposes a novel design approach for the PP which can cater to the pressin...

The conventional test schemes for Chip Multiprocessors (CMPs) are costly, time consuming and power hungry. This demands search for new test methodologies. In this work, we employ cellular automata (CA) to develop a high speed protocol verification logic for CMPs realizing directory based cache coherence system. A special class of CA referred to as...

This work reports a high speed protocol verificaion logic for Chip Multiprocessors (CMPs) realizing directory based cache coherence system. A special class of cellular automata (CA) referred to as single length cycle 2-attractor CA (TACA), has been introduced to identify the inconsistencies in cache line states of processors private caches. The int...

The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. The conventional solutions for verification of cache coherence targeting small systems are not so effective in CMPs. The CMPs cache system further demands a protocol independent test logic. In this work, we propose an effective solution to t...

A three-dimensional (3D) IC using through silicon via (TSV) has been found to be more effective to cope with the challenges faced by current 2D technologies. Post-bond testing of TSVs has been identified as a major challenge for yield assurance in 3D ICs. This work proposes a novel post-bond test scheme for TSVs in a 3D ICs. The solution/design is...

The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. In this work, we propose an effective solution to the issue through introduction of highly efficient test logic (fault detection unit). The test design is based on the modular structure of Cellular Automata (CA). The SACA (single length sing...

This work reports a simple and efficient solution to the consensus problem among the nodes of a distributed system. The solution proposed considers both the communication link and node failures thereby making the fault coverage better than the schemes reported so far. Detection of the faulty links and nodes make this scheme more transparent. Better...

This work proposes an efficient test design for verification of cache coherence in CMPs (Chip Multiprocessors). It ensures data coherence more accurate and reliable in a system with thousands of on-chip processors realizing MESI protocol. The design is based on the modular structure of Cellular Automata (CA), a modeling tool invented by von Neumann...

A three-dimensional (3D) IC containing multiple dies, connected by through silicon vias (TSV) offers many benefits over current 2D ICs. Reliability and accuracy of D integration using thousands of TSVs has to be ensured. However, 3D testing has found to be more difficult compared to that of 2D. This work proposes an elegant test scheme for high spe...

This work proposes an efficient test design for verification of cache coherence in CMPs (Chip Multiprocessors). It ensures data coherence more accurate and reliable in a system with thousands of on-chip processors. The design is based on the theory of a special class of Cellular Automata (CA) referred to as the SACA and can effectively be exploited...

In CMPs (Chip Multi-Processors) with thousand of processors, the issue of power dissipation has emerged out as a matter of serious concern. Out of the several factors responsible for processor power dissipation, the branch prediction unit of a modern processor itself contributes to almost 10% of the overall power dissipation. It points to the fact...

The data coherence in the cache systems of CMPs with thousands of processors are to be more accurate and reliable. This work proposes an effective solution to address this issue through introduction of highly efficient test logic with the cache controller. It is based on the modular structure of Cellular Automata (CA) and a special class of CA refe...

This work reports an efficient solution of reaching agreement in a distributed system. The proposed solution operates on a system with faulty processes that take arbitrary finite time before crash. It is set to tolerate more faults compared to the classical Byzantine simultaneously reducing the volume of message exchanges. The introduction of Cellu...

The wireless sensor network (WSN) encounters resource restrictions such as low computational power, reduced bandwidth & limited power resource and it demands efficient management of such resources. This work proposes a scheme (SSMCA), developed around the cellular automata (CA), for efficient management of battery power in sensor nodes with optimiz...

The single attractor cellular automata (SACA) is of prime interest in devising schemes for different applications specially in authentication and cryptography. The synthesis of SACA in linear/additive domain has been proposed in literature. This work reports characterization of such a special class of CA beyond linear domain. The characterization i...

Wire crossings limit the performance of a logic circuit in Quantum-Dot Cellular Automata (QCA) based design. Minimization of wire-crossings is, therefore, of prime importance in the current nanotechnology, susceptible to high error rates. This work proposes a QCA (Quantum-Dot Cellular Automata) logic gate (UQCALG) realizing the universal functions....

This work introduces a universal Quantum-Dot Cellular Automata logic gate (UQCALG) for synthesizing symmetric functions with the target to reduce wire crossings in a design as well as the number of operating clock cycles. It is realized with the coupled majority-minority gate (CMVMIN) structure. The proposed UQCALG structure not only improves perfo...

Synthesis of efficient DFT (Design for Testability) logic is of prime importance in robustly testable design of QCA based logic circuits. An ingenious universal QCA gate structure, Coupled Majority-Minority (CMVMIN) gate, realizes majority and minority functions simultaneously in its 2-outputs. This device enables area saving implementation of comp...

This work reports an efficient solution for reaching agreement (consensus) among the processes of a distributed system. The better efficiency is achieved through early disposal of faulty processes while approaching for a consensus. The introduced network partitioning scheme further facilitates the progress by reducing the message exchange overhead....