Luciano Volcan Agostini

Universidade Federal de Pelotas | UFPEL · Technology Development Center (CDTec)

The Alliance for Open Media (AOMedia) (AV1) was released in 2018 as a royalty-free and open-source video codec. AV1 was developed by the AOMedia that is composed of many leading tech companies. AV1 has the goal to process ultrahigh definition (UHD) 8K (7680 $\times$ 4320 pixels) and 4K videos (3840 $\times$ 2160 pixels) and to achieve high codi...

The emerging of 3D video-capable embedded mobile devices is expected due to the popularization of multimedia services and the demand for novel immersive video technologies. Such devices require efficient hardware-friendly heuristics to deal with strict processing requirements and limited energy supply. To contribute to these requirements, this work...

The digital video coding process imposes severe pressure on memory traffic, leading to considerable power consumption related to frequent DRAM accesses. External off-chip memory demand needs to be minimized by clever architecture/algorithm co-design, thus saving energy and extending battery lifetime during video encoding. To exploit temporal redund...

3D-HEVC is the state-of-the-art standard to compress three-dimensional videos. One of the 3D-HEVC novel tools is the DIS tool, which is used to efficiently compress smooth and homogeneous areas of depth maps by using four different prediction modes. The decision of which DIS mode will be used is done through the SVDC similarity criterion in the DIS...

With the increasing demand for digital video applications in our daily lives, video coding and decoding become critical tasks that must be supported by several types of devices and systems. This paper presents a discussion of the main challenges to design dedicated hardware architectures based on modern hybrid video coding formats, such as the High...

This paper presents an extensive evaluation of the HEVC parallel video coding when using Tiles. The evaluation consists on finding the tiling pattern that yields the maximum possible speedup for a set of video sequences considering several encoding parameters, measuring the coding efficiency variation of using such tiling pattern instead of the uni...

Real-time digital video coding became a mandatory feature in current consumer electronic devices due to the popularization of video applications. However, efficiently encoding videos is an extremely processing/energy-demanding task, especially at high resolutions and frame rates. Thus, the limited energy resources and the dynamically varying system...

This article presents a parallelism exploration over the depth modeling mode 1 (DMM-1) encoding algorithm of the 3D high-efficiency video coding (3D-HEVC) standard and applied the proposed solutions in a multicore central processing unit (CPU) and two graphics processor unities (GPU). The article evaluates efficient parallel algorithms for DMM-1, w...

This paper proposes a tile adaptation for workload balancing to speed up the 3D-High Efficiency Video Coding (3D-HEVC) encoder. Experiments were done to evaluate the usage of tiles when encoding texture and depth maps considering a static uniform partitioning. Based on these evaluations, we observed that the encoding workload of neighboring frames...

The AOMedia Video 1 (AV1), developed by the Alliance for Open Media (AOM) industry consortium and released in 2018, is an open-source and royalty-free video coding format. The goal of AV1 is to deliver substantial compression gains over state-of-the-art codecs such as VP9 and HEVC, while keeping a practical decoding complexity, hardware feasibility...

This chapter presents an overview of the state-of-the-art research on computational effort reduction of the intra-frame prediction, and inter-frame and inter-view predictions, which are the two main topics that this book is focused.

This chapter summarizes the conclusions and the contributions described along with this book. It highlights the importance of reducing the encoding effort of the Three-Dimensional High Efficiency Video Coding (3D-HEVC) depth maps and presents a brief description of the main contributions described throughout the chapters. Besides, this chapter show...

The intra-frame prediction of the Three-Dimensional High Efficiency Video Coding (3D-HEVC) depth maps encompasses several new encoding tools that were not used by texture coding. Besides, it inherits the texture encoding tools without considering depth map characteristics that could be used for simplifying those algorithms. Therefore, this chapter...

This chapter presents the developed algorithms for encoding time reduction of the depth map inter-frame prediction. Three algorithms are presented along with their motivational analysis, where each algorithm actuate in a different encoding level. The first algorithm considered the simplicity of the depth maps and target Motion Estimation (ME) and D...

This chapter provides background about Three-Dimensional High Efficiency Video Coding (3D-HEVC) depth map encoding. Initially, the 3D-HEVC encoding structure is defined, relating its frame to a quadtree-like structure. The algorithms used in the intra-frame prediction of depth maps are described in detail, allowing a comparative understanding regar...

This book describes and analyzes in detail the encoding effort and the encoding tool usage applied to 3D-HEVC depth map coding. Based on the analyzed information, the authors introduce efficient algorithms for accelerating the available encoding tools. The contributions discussed in this book include four algorithms for reducing intra-frame encodin...

This paper proposes an architectural parallelism exploration for 3D-High Efficiency Video Coding (3D-HEVC) depth map intra-frame prediction. This work targets data parallelism using the pattern-and block-based approaches for the entire intra-frame prediction flow, encompassing Depth Modeling Modes (DMMs), HEVC intra-frame prediction and Depth Intra...

The 3D-HEVC is the state-of-art encoder for 3D videos. This article focuses on the 3D-HEVC depth-map intra prediction. Novel heuristics to reduce the computational effort are explored to design a high-throughput architecture, which supports both the 3D-HEVC tools and the tools inherited from the HEVC. The synthesis results were generated targeting...

With the high computational complexity of transcoding video from the H.264/AVC standard to the state-of-the-art High Efficiency Video Coding (HEVC) standard, new approaches must be explored to fasten up the adaptation of all legacy content. This work proposes a fast decision algorithm to reduce the transcoding complexity between the H.264/AVC and H...

This dissertation presents a fast depth map coding for 3D-High Efficiency Video Coding (3D-HEVC) based on static Coding Unit (CU) splitting decision trees. The proposed solution is based on our previous works and avoids the costly Rate-Distortion Optimization (RDO) process for depth maps coding, which evaluates several possibilities of block partit...

This paper analyzes the usage of tiles in 3D-High Efficiency Video Coding. We investigate the encoding impact of some tiles divisions using a Bjontegaard delta rate (BD-rate) on the common test conditions for 3D videos. This analysis demonstrated dividing the video into square tiles increases the encoding performance compared to non-square tiles (a...

This paper presents a dedicated hardware design for the DC and Chroma from Luma (CFL) intra-prediction modes of AV1 decoder. The hardware was designed to reach real-time when processing UHD 4K videos. The AV1 codec is an open-source and royalties-free video coding, which was developed by the AOMedia group, this group is composed of multiple compani...

This paper presents hardware designs for the encoder and decoder of the 3D-High Efficiency Video Coding (3D-HEVC) bipartition modes targeting real-time processing of high-resolution videos. These hardware designs include the depth modeling modes 1 (DMM-1) and 4 (DMM-4). The encoder was designed using a simplification in the DMM-1 algorithm with the...

The 3D-HEVC adopts the Disparity Estimation to efficiently reduce the Inter-view redundancies, which occur when the same scene is captured from different positions. Since the camera arrangement usually follows a horizontal alignment, horizontal disparities are more common. So, this paper presents a dedicated hardware to perform the Disparity Estima...

This brief presents a high-throughput hardware design for the motion compensation (MC) sub-sample interpolator of the novel AOMedia video 1 (AV1). A multifilter interpolation architecture (MFIA) is presented targeting AV1 decoders and supporting all 90 filters defined by the AV1 MC. The MFIA uses shift-adds instead of multipliers and common subexpr...

Recent technological advancements allowed videos to come from a simple sequence of 2D images to be displayed in a flat screen display into spherical representations of one’s surroundings, capable of creating a realistic immersive experience when allied to head-mounted displays. In order to explore the existing infrastructure for video coding, 360-d...

One of the most concerning issues in current video coding systems relies on the bottleneck caused by the intense external memory access required by motion estimation. As memory access affects directly the energy consumption, this problem becomes more evident when battery-powered devices are considered. In this sense, this article presents the Doubl...

Video transrating has become an essential task to allow the transmission of different versions of the same video in streaming services and live applications. However, as the transrating operation comprises a decoding and an encoding step in sequence, it demands high processing time and energy consumption, which is prohibitive in large-scale systems...

The Hadamard-based Sum of Absolute Transformed Differences (SATD) is a distortion metric that correlates better with other video encoding steps than the commonly used Sum of Absolute Differences (SAD) and thus potentially improves coding efficiency. However, due to the Hadamard Transform (HT), it demands a large share of total encoding time. Meanwh...

This article presents a fast depth map encoding for 3D-High Efficiency Video Coding (3D-HEVC) based on static decision trees. We used data mining and machine learning to correlate the encoder context attributes, building the static decision trees. Each decision tree defines if a depth map Coding Unit (CU) must be or not be split into smaller blocks...

Real-time operation and low-power dissipation in video coding systems have become important research challenges, especially in mobile devices with limited battery and computational resources. Given the variety of applications able to manipulate videos and the growing number of video coding standards, current devices are expected to provide native s...

This paper proposes a history-based tiling algorithm aiming at the increase of speedup when using Tiles. The algorithm is composed of two independent steps that use workload history information to define the vertical and horizontal boundaries of the Tiles. The workload distribution of previous frames is used as reference to perform the tiling of th...

—This paper presents a high-throughput energy and rate-aware hardware design for the Motion Estimation (ME) according to the High Efficiency Video Coding (HEVC) standard. The hardware design implements a modified Test Zone Search (TZS) algorithm to perform Integer Motion Estimation (IME) as well as the Fractional Motion Estimation (FME) defined by...

The depth maps intra-frame prediction of 3D High-Efficiency Video Coding (3D-HEVC) inherits all texture encoding techniques provided by HEVC and provides new coding tools for depth map predictions. These tools comprise algorithms such as bipartition modes, intra-picture skip, and DC-only. This paper details these tools and shows how they work toget...

To encode the depth maps efficiently, 3D-HEVC introduced three intra-frame prediction tools: (i) Depth Intra Skip (DIS), (ii) Depth Modeling Modes (DMMs), and (iii) Segment-wise DC Coding (SDC) that raise the encoding effort. Therefore, we analyzed the most time-consuming steps at the intra-frame prediction and proposed a model-level scheme for red...

The popularization of multimedia services has pushed forward the development of 2D/3D video-capable embedded mobile devices. Such devices require efficient energy/memory-management strategies to deal with severe memory/processing requirements and limited energy supply. Therefore, we propose a Motion and Disparity Estimation system – the most memory...

The 3D-high efficiency video coding has introduced tools to obtain higher efficiency in 3-D video coding, and most of them are related to the depth maps coding. Among these tools, the depth modeling mode-1 (DMM-1) focuses on better encoding edges regions of depth maps. The large memory required for storing all wedgelet patterns is one of the bottle...

Video-coding systems require a large external memory bandwidth to encode a single video frame. Many modules of the current video encoders must access the external memory to read and write data resulting in large power consumption, since memory-related power is dominant in current digital systems. Moreover, external memory access represents an impor...

A block-level fast coding scheme for depth maps coding in 3D-high efficiency video coding (3D-HEVC) is presented. The proposed scheme uses the information of the correlated texture coding unit (CU) to accelerate the encoding depth map CU. The experimental analysis demonstrates that when the SKIP mode encodes the texture CU, the current depth map CU...

This paper presents a rate and complexity-aware coding scheme for fixed-camera videos that are designed to improve image quality in Regions of Interest (ROI) by prioritizing the encoding of such regions through the use of a modified mode decision equation. ROIs are defined in this work as faces, with the application of a face detection algorithm. B...

This work presents a low-area scalable architecture for the Depth Modelling Mode 1 (DMM-1) encoder of the 3D High Efficiency Video Coding (3D-HEVC) standard, removing the refinement stage. This simplification causes a small BD-rate increase (0.09%) but a significant reduction in memory usage of 30%. The scalable architecture can support different b...