
Jose Miguel Rocha-PérezInstituto Nacional de Astrofísica, Óptica y Electrónica (INAOE) | INAOE · Electronics Coordination
Jose Miguel Rocha-Pérez
PhD
About
85
Publications
28,639
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408
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Citations since 2017
Introduction
He received the B.S. degree in Electronics from the Universidad Autónoma de Puebla, in 1986 and the M.Sc. and Ph.D. degrees from INAOE, in 1991 and 1999, respectively. In 2002, he was a Visiting scholar in the Dep. of Electrical Engineering at Texas A&M University, and CINVESTAV GDL in 2003. In 2004 he worked as design engineer in Freescale Semiconductor, México. He is currently working at INAOE. His current research interests are on the design of integrated circuits for biomedical applications.
Additional affiliations
January 1991 - present
Publications
Publications (85)
Self-powered RF passive sensors have potential application in temperature measurements of patients with health problems. Herein, this work presents the design and implementation of a self-powered UHF passive tag prototype for biomedical temperature monitoring. The proposed battery-free sensor is composed of three basic building blocks: a high-frequ...
In this work the design and implementation of a High-Speed Four-Quadrant CMOS Analog multiplier is presented. The proposed multiplier uses the Gilbert cell as the main core. However, instead of processing both input and output signals in voltage or current mode, the ”x” input signal is applied in voltage mode while the ”y” input signal and ”o” outp...
In this work the design and implementation of a white-cane suitable for blind people is presented. The sensing method is based on the relation distance/vibration; the closer the object, the faster is the vibration magnitude. The magnitude of this vibration is passed by four micro DC motors into the fingers of the user, indicating the proximity to t...
This paper presents the experimental evaluation of a Differential Pair with Active Loads (DPAL), designed and fabricated with a 0.5 μm CMOS process, when operated at a bias current of 1 nA and a power supply of 1 V. The objective is to verify that this circuit can properly perform analog functions while dissipating 1 nW. Therefore, experimental mea...
A CMOS low-voltage amplifier with approximately constant bandwidth and DC rejection is introduced. The design is based on the cascade of a wide linear input range OTA and an op-amp and a servo-loop with extremely large time constants. It operates with ±0:45V supplies and a power consumption of 0.81mW in 180nm technology. The bandwidth changes only...
In this paper, we present the design of an analog Automatic Gain Control with a small silicon area and reduced power consumption using a 0.5 µm process. The design uses a classical approach implementing the AGC system with simple blocks, such as: peak detector, difference amplifier, four-quadrant multiplier, and inversor amplifier. Those blocks wer...
This work presents a Cap-less Low-Drop Out (LDO) Voltage Regulator that uses a Bootstrap Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network. Previous works use active compensation networks whose frequency response shows a high-pass behavior that depends on their compensation capacitor Cf. The dominant pole is rel...
A technique to implement true-sample-and-hold circuits that hold the output for almost the entire clock cycle without resetting to zero is introduced, alleviating the slew rate requirement on the opamp. It is based on a Miller op-amp with an auxiliary output stage that increases power dissipation by only 1.3%. The circuit is offset-compensated and...
Abstract: Silicon Photomultipliers (SiPM) are currently an excellent option to replace the traditional photomultiplier tubes (PMT) due to the fact that they require much lower operational voltages
than the PMTs with photon detection efficiencies (PDE) higher than 40% at peak wavelengths (in the blue-green visible part of the spectra), do not requir...
Diseño de un Amplificador de Instrumentación en Bajo Voltaje y Baja Potencia para Aplicaciones Implantables
First performance evaluation of MexSiC - a readout ASIC for analog SiPM based Cherenkov
Detectors
Active filter design is a mature topic that provides good solutions that can be implemented using discrete devices or integrated circuit technology. For instance, when the filter topologies are implemented using commercially available operational amplifiers (opamps), one can explore varying circuit parameters to tune the central frequency or enhanc...
Designing a new Data Acquisition Circuit for SiPM-based Detection Systems - MexSiC
A simple technique to implement highly power efficient class AB-AB Miller op-amps is presented in this paper. It uses a composite input stage with resistive local common mode feedback that provides class AB operation to the input stage and essentially enhances the op-amp's effective transconductance gain, the dc open-loop gain, the gain-bandwidth p...
The design of a very compact four quadrant CMOS analog multiplier is presented. The circuit has a very simple design, consisting of only four transistors and ten resistors, enabling a very small silicon area consumption. Furthermore, the multiplier can work in both subthreshold and saturation region, allowing it to operate over a wide range of freq...
In this paper a wireless microcontroller based heart rate and oxygen saturation monitor, known as pulse oximeter, is described. Pulse oximetry is a non-invasive method which uses the signal of two light sources at different wavelength and a photodetector to capture the amount of light that is transmitted through a tissue. The signal captured, named...
This work presents and validates the design of a four-quadrant analog multiplier based on the bulk-driven technique. Using the source–gate as well as the bulk–source voltages of a PMOS transistor as input ports, the multiplication task can be achieved. The AC signals are injected into the bulk terminals by means of a very-low-frequency programmable...
Modular discrete and integrated implementations of a continuous-time analog rank-order N input filter are presented that uses one operational transconductance amplifier per input. Rank is programmable for all values from \(k=1\) (min case) to \(k=N\) (max case). The implementation is based on transconductance cells with high transconductance gain a...
Diseño de un Amplificador de Instrumentación en Bajo Voltaje y Baja Potencia para Aplicaciones Implantables
In this paper a wireless microcontroller based heart rate and oxygen saturation monitor, known as pulse oximeter, is described. Pulse oximetry is a non-invasive method which uses the signal of two light sources at different wavelength and a photodetector to capture the amount of light that is transmitted through a tissue. The signal captured, named...
In this paper the design and development of a wireless heart rate and oxygen saturation monitor based on low cost microcontrollers is described. Pulse oximetry is used to measure these vital signs. This is a non-invasive method that uses two light sources at different wavelength and a photodetector to capture the amount of light that is transmitted...
In this paper, a two-stage amplifier with feedforward frequency compensation scheme is presented. Because the frequency compensation scheme uses the amplifier's second stage gm to create the feedforward path no additional circuitry is needed. To verify the proposed scheme a prototype was fabricated using technology. Measurements results demonstrate...
The present chapter is about the synthesis and design of a passive mixer in CMOS technology with output power managment, which satisfies the demands established by Bluetooth and Ultra Wideband (UWB). The simulation in Mentor Graphicsr ICstudio 2008.2b of the harmonic mixer for the Bluetooth and UWB standards with the UMC 0.18μm Mixed Mode and RF CM...
The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a low power consumption, improve standard deviation (σ) control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5µm CMOS process from MOSIS foundry wa...
This work presents the design and experimental results of two Analog CMOS Rank Order Filters (ROF's), both of them based on the same operation principle and working with a specific analog CMOS comparator. The design of the two ROF's were performed with ON Semi 0.5 µm CMOS technology through MOSIS. Both comparators present a high gain due to the use...
The present chapter is about the synthesis and design of a passive mixer in CMOS technology with output power managment, which satisfies the demands established by Bluetooth and Ultra Wideband (UWB). The simulation in Mentor Graphics? ICstudio 2008.2b of the harmonic mixer for the Bluetooth and UWB standards with the UMC 0.18μm Mixed Mode and RF CM...
This paper presents a compact low-power bidirectional current mirror suitable for low-voltage applications. The key element is the use of a CMOS complementary input stage working in subthreshold regime; which allows setting a reduced bias current through the mirror. The circuit was simulated using LTSpice and presents class AB operation with a THD...
The design and simulation of a 2nd harmonic based upconverter is introduced. With the proposed upconverter, it is possible to reach a good noise figure with power and area reduction. The design of the circuit was made with the UMC \(0.18\,\upmu \hbox {m}\) Mixed Mode/RF CMOS technology. However, the design methodology can be extended to a different...
INTRODUCCION: Actualmente existen numerosas aplicaciones para la tecnología MEMS (Micro-Electro-Mechanical System, por sus siglas en inglés) donde se conjugan diferentes disciplinas como la biología, mecánica y la microelectrónica, entre otras [1]. Estos sistemas MEMS son dispositivo de tamaño micrométrico tridimensionales, que pueden usarse como s...
The feasibility of implementing analog CMOS VLSI weighted median filters for image and signal processing is discussed. The proposed weighted median filter uses a transconductance comparator as a basic cell, where the output saturation current is used as the weight parameter in the median filter. Experimental results of the proposed analog weighted...
This work presents the design of a current mode instrumentation amplifier (CMIA) based on the flipped voltage follower (FVF), used as a double current sense mechanism. Unlike current state of the art, the proposed CMIA senses the sourced and sank current of the voltage follower buffer inside the Op-Amp inputs. The FVF low-impedance input node allow...
This work proposes a Digitally Enhanced Low-Drop Out Voltage Regulator (DE-LDO) for Ultra High Radio Frequency IDentification (UHF RFID) passive tags. The DE-LDO design approach is based on the Finite State Machine (FSM) nature of the tag Digital Control. Injecting part of the FSM unconsumed current into LDO loop to enhance transient response, a mo...
This work presents a 910MHz/2.4GHz dual-band dipole antenna for Power Harvesting and/or Sensor Network applications whose main advantage lies on its easily tunable bands. Tunability is achieved via the low and high frequency dipole separation W gap . This separation is used to increase or decrease the S11 magnitude of the required bands. Such tunab...
The design, implementation and characterization of four Low Noise Amplifier architectures in a double poly, four metal layers, 0.35 μm CMOS technology from AMS AG biased at 1.2 V with a power consumption as low as 2.73 mW operating in a frequency band ranging from 1.94 to 2.58 GHz with Noise Figure around 1.3 dB and input intercept point up to 10 d...
The design, implementation and characterization of four Low Noise Amplifier architectures in a double poly, four metal layers, 0.35 μm CMOS technology from AMS AG biased at 1.2 V with a power consumption as low as 2.73 mW operating in a frequency band ranging from 1.94 to 2.58 GHz with Noise Figure around 1.3 dB and input intercept point up to 10 d...
The Silicon rich silicon oxide (SRO) is a CMOS compatible material that present light emission properties when annealed at high temperatures to produce the silicon segregation process. This material can be used to integrate optoelectronics circuits. However, during the CMOS fabrication process there are thermal processes that could alter the charac...
A two-stage CMOS operational amplifier with both, gain-boosting and indirect current feedback frequency compensa-tion performed by means of regulated cascode amplifiers, is presented. By using quasi-floating-gate transistors (QFGT) the supply requirements, the number of capacitors and the size of the compensation capacitors respect to other Miller...
The experimental results of the Fowler-Nordheim characterization using poly1-poly2 capacitors on CMOS ON Semi 0.5 μm technology are presented. This characterization allows the development, design, and characterization of a new current-mode analog nonvolatile memory. Experimental results of the memory cell architecture are presented and demonstrate...
Currently, a CMOS imager capable of detecting from Ultraviolet-to-Near Infrared (UV to NIR) light is desirable. A new silicon sensor that detects from UV to NIR to be used for CMOS imaging was developed. However, the range of photo current generated by this sensor is wide. Then, there is a need to develop CMOS circuits with a wide dynamic range to...
The design and implementation of three analog median filter topologies, whose transistors operate in the
deep weak-inversion region, is described. The first topology is a differential pairs array, in which drain
currents are driven into two nodes in a differential fashion, while the second topology is based on a wide range OTA, which is used to max...
An 1.5V CMOS voltage-mode MIN circuit with 3N+1 complexity and 10mV/10ns corner error is presented. The proposed approach uses a low impedance configuration to operate with low voltage supply requirements and without the need of low-voltage techniques with large area requirements. The basic cell and an LTA circuit prototype were simulated, fabricat...
A Membership Function Generator Circuit (MFGC) with bias supply of 1.5 Volts and independent DC-voltage programmable functionalities is presented. The realization is based on a programmable differential current mirror and three compact voltage-to-current converters, allowing continuous and quasi-linear adjustment of the center position, height, wid...
In this paper, the synthesis, design, and implementation of a programmable phase shifter circuit for sinusoidal signals is presented. The proposed circuit, built-up herein with operational amplifiers (OPAMPs), high precision resistors and low voltage switches, consists of a digitally controlled amplitude attenuator in combination with a single-tone...
This paper introduces the experimental realization of the first integratedcircuit of a multi-scroll continuous chaotic oscillator showing 3- and 5-scrollattractors. It is based on a variant of the Chua’s system. The most relevant issue is the implementation of a saw-tooth-like nonlinear function, which is designed by using floating gate MOS (FGMOS)...
This paper presents a compact bidirectional current mirror suitable for low voltage applications. The idea is to use complementary transistors in subthreshold which are able to set a reduced bias current through the mirror. The circuit presents a class AB operation with a THD near to 1% at 1MHz. The bandwidth is above 10MHz as shown by simulations...
In this paper, the synthesis, design, and implementation of a programmable
phase shifter circuit for sinusoidal signals is presented. The proposed circuit, built-up
herein with operational amplifiers (OPAMPs), high precision resistors and low voltage
switches, consists of a digitally controlled amplitude attenuator in combination
with a single-tone...
A novel high-value resistor, which is biased with a floating voltage source to operate in the sub threshold region, is presented. The proposed circuit shows an improved linear range and a more precise control of the resistance value in respect to other similar realizations. Those improved characteristics allow implementing large RC time-constants,...
An additional stage for a Low Voltage Lazzaro’s Winner take All (WTA) circuit is introduced. It allows lowering the voltage supply requirements so that it can be functional in fine line CMOS technology. Electrical measurements of a prototype in CMOS 0.5μm technology verify the operation of the WTA circuit with VDD = 1.5V. Simulations in PSpice
and...
Resumen—En este trabajo, se presenta el proceso de análisis, diseño y medición, de un circuito que permite la obtención de la raíz fraccional, haciendo uso de las propiedades de bajo consumo de energía y la relación exponencial que presentan los transistores MOSFET en la región de sub umbral. En el proceso de simulación, diseño del circuito y gener...
This work provides an accurate methodology for extracting the floatinggate gain factory, of CMOS floatinggate inverters with a clockdriven switch for accessing temporarilly to the floatinggate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances coupled to the floatinggate can be easily extracted in a mis...
Silicon photodetectors have a limited response in the visible range. However, the silicon technology is currently the most important. Then there is the need to develop silicon sensors that are able to detect radiation in different ranges. In this paper, a sensor, that uses Si nano-particles, sensible in the whole range form 200 to 1100 nm is charac...
This paper presents the cointegration of an UV silicon sensor with extended responsivity, and its conditioning circuit. The sensor's output current is converted to a digital code for subsequent processing. Post-layout results shows a suitable response in order to obtain a digital code corresponding to sensor photocurrent in the range of 200 to 1100...
This work provides an accurate methodology for extracting the floating-gate gain factory, of CMOS floating-gate inverters with a clock-driven switch for accessing temporarilly to the floating-gate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances coupled to the floating-gate can be easily extracted in a mis...
Design and implementation of two analog median filter cells are described. The first topology is a differential pairs array, which drain currents are driven into two nodes in a differential fashion. The second topology is based on a wide range OTA, which is used as basic block to maximize the dynamic range. Fabrication parameters for a MOSIS proces...
In this work, an experimental comparison between measured FG CMOS inverters using the quasi-floating gate (QFG) and layout-based
(L-b) techniques for charge removal in the Floating-gate (FG) and simulations through PSpice is presented. The experiment
was developed through the measurements of 40 different IC’s with a total of 200 FG and QFG CMOS inv...