Jose L. Huertas

• PhD
• Spanish National Research Council

A technique for real-time monitoring of bio-impedances using a Voltage Oscillation (VO) methodology is proposed. The main idea relies on connecting the bio-system in such a way that a suitable electrical oscillator, which only uses a DC power source, is built. Thanks to the employed electrical models, the oscillation parameters can be directly rela...

In this article, some of the main contributions to BI (Bio-Impedance) parameter-based systems for medical, biological and industrial fields, oriented to develop micro laboratory systems are summarized. These small systems are enabled by the development of new measurement techniques and systems (labs), based on the impedance as biomarker. The electr...

Since October 2008 the University of Seville offers the official degree of “Master in Microelectronics, Design and Applications of Micro/Nanoscale Systems”. This Master features a distinguishing characteristic with respect to virtually all existing similar courses, namely the peculiarity of being taught online. It constituted a real novelty at the...

In this paper are summarized some of the main contributions to BioImpedance (BI) parameter-based systems for medical, biological and industrial fields, oriented to develop micro laboratory systems. These small systems are enabled by the development of new measurement techniques and systems (labs), based on the impedance as biomarker. The electrical...

A technique for real-time monitoring of bio-impedances using a Voltage Oscillation (VO) methodology is proposed. The main idea relies on connecting the bio-system in such a way that a suitable electrical oscillator, which only uses a DC power source, is built. Thanks to the employed electrical models, the oscillation parameters can be directly rela...

A system for cell-culture real-time monitoring using an oscillation-based approach is proposed. The system transforms a cell culture under test into a suitable “biological” oscillator, without needing complex circuitry for excitation and measurement. The obtained oscillation parameters are directly related to biological test, owed to an empirically...

A method for cell-culture real-time monitoring based on ECIS techniques, using the Oscillation-Based Test (OBT) concept is proposed. The core idea is the proposal of a strategy for the conversion of the Cell-Culture Under Test, CCUT into a suitable “biological” oscillator, whose characteristic parameters (frequency, amplitude, phase, etc…) are rela...

A method for cell-culture real-time monitoring by means of Oscillation-Based Test (OBT) technique is proposed. The idea is inspired in previous works from the authors in the area of testing analogue integrated circuits and deals with solving some critical points in this kind of biological measurements. A simple topology based on a non-linear elemen...

This work presents a modification of traditional Oscillation-Based Test schemes for sampled-data systems. This new test scheme is based on doubling the sampling frequency when the oscillation changes its sign. This way, the DC level of the output oscillation signal becomes a simple signature sensitive to the settling errors in the device under test...

This work proposes a generic path to improve Alternate Test strategies. It demonstrates that multi-condition test increases the amount of information present in the test data and consequently decreases the prediction error of the trained models. The ambition of this paper is to be a methodological contribution to the field of AMS-RF test, and forma...

This work demonstrates that multi-VDD conditions may be used to improve the accuracy of machine learning models, significantly decreasing the prediction error. The proposed technique has been successfully applied to a previous alternate test strategy for LNAs based on response envelope detection. A prototype has been developed to show its feasibili...

This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized r...

This paper presents a design methodology for the implementation of efficient and accurate sinewave generators suitable for analog and mixed-signal BIST applications. The design guidelines are based on an analytical discussion that contemplates the main non-idealities of the generator. A full design example is presented to illustrate the proposed me...

This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and analysis of the two-tone response envelope of the device under test (DUT). The response envelope is processed to obtain a simple digital signature sensitive to key specifications of the DUT. The anal...

A simple on-chip procedure for testing embedded RF blocks is presented. It is based on the detection and spectral analysis of the two-tone response envelope of the device under test (DUT). A main difference with similar methods is its inherent simplicity, avoiding a preprocessing stage and resorting to simpler circuitry to process the envelope. As...

This paper presents an overview of test techniques that offer promising features when Built-In-Self-Test (BIST) must be applied to complex integrated systems including analog, mixed-signal and RF parts. Emphasis is on techniques exhibiting a good trade-off between test requirements (basically in terms of signal accuracy and frequency) and test qual...

This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and spectral analysis of the two-tone response envelope of the block under test. The main non-linearity specifications of the block under test can be easily extracted from the envelope signal. The analyt...

This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and spectral analysis of the two-tone response envelope of the block under test. The main non-linearity specifications of the block under test can be easily extracted from the envelope signal. The analyt...

As part of a Low-IF ZigBee receiver, a 2.4GHz difierential common source low noise amplifler, implemented in a 90nm mixed/RF 7M CMOS process and designed in moderate in- version, is presented in this work. Design methodology and simulation results from Spectre-RF simulator are presented. With 2.5V supply voltage, the LNA achieves a noise flgure of...

This paper discusses the test of data converters using the so-called Oscillation Based Test (OBT) approach [1]. Extension of the concept as applied to filters and sigma-delta converters are considered, paying attention to those applications where monitoring along the circuit lifetime can be worthwhile, as is the case for hostile environments. In th...

This paper studies long-term effects produced by ionizing radiation in a switched-capacitor filter, using the Oscillation Based Test (OBT) approach [1]. In this case, threshold voltage shifting is considered as one of the major concerning effects produced by Total Ionizing Dose (TID). Simulation results show that the OBT approach is very well suite...

This paper studies the effects produced by radiation single event transient (SET) injected in the transistors of a custom operational amplifier, in order to evaluate their sensitivity to the radiation transient faults. A BID (built-in detector), was included in the circuit in order to amplify and detect the SETs effect. The circuit was designed usi...

This paper reports a case study about effects produced by the radiation Single Event Transient (SET) injection on a custom operational amplifier. SETs were injected in the operational amplifier transistors in order to evaluate their sensitivity to the radiation transient faults. The circuit was designed using a non-rad-hard AMS -CMOS 0.8µm process....

Radiation effects translated into Single Event Transients (SETs) and Single Event Upsets (SEUs) are dealt with, in this chapter, in the realm of analog and mixed-signal circuits. First of all, we revisit concepts and methods of the analog testing field looking for techniques that may help mitigating, at the system level, SETs and SEUs in these circ...

A complete VLSI Continuous Time Bidirectional Associative Memory (BAM) is presented. The short term memory (STM) section is implemented using small transconductance four quadrant multipliers and capacitors for the integrators. The long term memory (LTM) is built with an additional multiplier that uses locally available signals to perform Hebbian Le...

This paper proposes an analog sinewave signal generator with minimal circuitry resources. It is based on a linear time variant filter that gives a high quality sine signal in response to a DC input. The proposed architecture has the attributes of digital programming and control capability, robustness and reduced area overhead, what make it suitable...

What to test and what does test need for a complex mixed-signal ASIC are the two main issues this tutorial will try to focus. It will account for several factors: Stimuli generation. An efficient test procedure would use a single signal especially a signal that is easily supplied to a selected input or generated on-chip. Sufficient access. It is pr...

Oscillation-Based Test in Mixed-Signal Circuits presents the development and experimental validation of the structural test strategy called Oscillation-Based Test – OBT in short. The results here presented allow to assert, not only from a theoretical point of view, but also based on a wide experimental support, that OBT is an efficient defect-orien...

This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its subthreshold region. Three different sets of complete basic build...

This paper presents a method for extracting, in the digital domain, the main characteristic parameters of an analog sine-wave signal. It is based on a double-modulation, square-wave and sigma-delta, together with a simple Digital Processing Algorithm. It leads to an efficient and robust approach very suitable for BIST applications. In this line, so...

A new very-low-voltage CMOS circuit strategy is presented for amplifying and AGC stages. Voltage supply scaling is optimised through the combination of log companding and the MOSFET operating in subthreshold. Based on this idea, a complete set of CMOS basic building blocks is proposed for programmable amplifiers and AGC circuits. Simulated and expe...

The behaviour of a novel and extremely compact resonant tunnelling diode (RTD)-based circuit able to implement a frequency divider is studied. It exhibits very high operating frequency and low power consumption. Compared to a previous similar reported circuit, it has wider operation windows, narrower quasi-periodicity regions and a higher division...

Nonlinear synthesis and design can be informally defined as a constructive procedure to interconnect components from a catalog of available primitives, and to assign values to their constitutive parameters to meet a specific nonlinear relationship among electrical variables. This relationship is represented as an implicit integro-differential operato...

This tutorial aims to introduce circuit designers to the problems of making integrated circuits more testable. An efficient test procedure for a complex, mixed-signal application specific integrated circuit (ASIC), must take several factors into consideration: stimuli generation, sufficient access, single test output, simple measurement set and sys...

This paper presents a true very low-voltage low-power complete analog hearing-aid system-on-chip as a demonstrator of novel analog CMOS circuit techniques based on log companding processing and using MOS transistors operating in subthreshold. Low-voltage circuit implementations are given for all of the required functions including amplification and...

This paper presents a method for extracting, in the digital domain, the main characteristic parameters of an analogue sine-wave signal. The required circuitry for on-chip implementation is very simple and robust, which makes the present approach very suitable for BIST applications. Solutions in this sense are addressed together with simulation resu...

This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down to 1 V) low-power (few hundreds of A) complete SoCs in CMOS technologies. The new design proposal is based on both, the Log Companding theory and the MOSFET operating in subthreshold. Several basic building blocks for audio ampli...

Using several analog-to-digital converters (ADCs) in parallel with convenient time offsets is considered an efficient way to push the speed limits of data acquisition systems. However, a serious drawback of this time-interleaving technique is that any mismatch between the channels will damage the precision. This paper gives a probabilistic descript...

This chapter aims to present a structural test methodology using the so-called OBT technique. The conceptual bases of the OBT approach are presented as well as many practical details on its application to practical integrated circuits.

Although most electronic circuits are almost entirely digital, many include at least a small part that is essentially analog. This is due to the need to interface with the real physical world, that is analog in nature. As demanding market segments require ever more complex mixed-signal solutions, high quality tests become essential to meet circuit...

Residue threshold functions are a broad class of symmetric functions that include all the unit-weighted threshold functions. In this paper, we investigate the complexity of the Reed-Muller (RM) expressions for these functions. We prove that an important subclass of the functions has very simple RM expansions and determine the conditions that define...

The contents of this chapter focus on the MOS device background needed to develop the analog circuit techniques presented in this work. Special attention is paid to the analytical large signal I/V model as the main tool for circuit design when implementing the Companding Theory. A specific extraction procedure is also introduced to obtain the requi...

This chapter presents a complete example on the application of all the new circuit techniques proposed in this work. The novel CMOS subthreshold topologies for Log amplification, filtering, generation and modulation are used here to implement a hearing-aid-on-chip for an industrial customer. Overall specifications for the application specific integ...

The following chapter includes all the new circuit techniques related to frequency selective stages. After reviewing the Log companding principle of operation, the generalization for the MOS transistor is presented. Based on these results, different types of CMOS basic building blocks for arbitrary Log filters are proposed in conjunction with a com...

This chapter focuses on the application of the filtering techniques presented in Chapter 4 to signal modulation in the Log domain. The research includes all the new basic building blocks used to synthesizing fully integrable pulse duration modulators (PDM). An experimental example is also supplied at the end to verify the validity of the proposed c...

Test and Design-for-Testability in Mixed-Signal Integrated Circuits deals with test and design for test of analog and mixed-signal integrated circuits. Especially in System-on-Chip (SoC), where different technologies are intertwined (analog, digital, sensors, RF); test is becoming a true bottleneck of present and future IC projects. Linking design...

Although most electronic circuits are almost entirely digital, many include at least a small part that is essentially analog. This is due to the need to interface with the real physical world, that is analog in nature. As demanding market segments require ever more complex mixed-signal solutions, high quality tests become essential to meet circuit...

This paper extends a study performed by the authors in previous papers dealing with the OBT approach applied to low-pass modulators ‘Microelectron. J. 33/10 (2002) 799’, showing herein the specific features associated to the bandpass case. A practical feedback strategy will be proposed in order to built an effective oscillator, which can be valuabl...

Dual Tone Multi-Frequency (DTMF) signalling (also known as Touch-Tone, Tel-Touch,etc.) has gained importance in the world of telecommunications (telephony, answering machines, remote control, credit cards, etc) at the expense of dial-pulse signalling due to its more efficient and higher reliability for transmission of signals. This paper presents a...

A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Ai...

Presents a new all-MOS circuit technique for very-low-voltage proportional-to-absolute temperature (PTAT) references. Optimization of supply scaling below the sum of threshold voltages is based on log companding and implemented by operating the MOSFET in weak inversion. The key design equations for current (μA) and voltage (sub-100 mV) references a...

A formal set of design decisions can aid in using oscillation-based test (OBT) for analog subsystems in SoCs. The goal is to offer designers testing options that do not have significant area overhead, performance degradation, or test time. This work shows that OBT is a potential candidate for IP providers to use in combination with functional test...

The oscillation-based test of integrated filters is discussed. The test techniques detect faults in mixed-signal circuits and require little modification to the circuits under test. By comparing both the oscillations amplitude and frequency, acceptable test quality is obtained. An efficient test procedure for a complex, mixed-signal application spe...

This work presents a simple and low-cost method for on-chip evaluation of test signals coming from the application of the Oscillation-Based-Test (OBT) technique. This method extracts the main test signal features (amplitude, frequency and DC level) in the digital domain requiring just a very simple and robust circuitry. Experimental results obtaine...

This paper discusses a way of applying the oscillation-based test (OBT)/oscillation-based built-in-self test concept to oversampled ΣΔ modulators, exploiting previous experience coined through the implementation of OBT in SC integrated filters. Analytical and simulation results demonstrate that it is always feasible to find out an OBT configuration...

A simple start-up strategy specially suitable for the oscillation-based-test application of opamp-based circuits is presented. The proposed approach not only ensures that the oscillator will start to run (safe start-up) but also the steady-state (SS) can be reached very fast (short transient-time).

Frequently, the logic designer deals with functions with symbolic input variables. The binary encoding of such symbols should be chosen to optimize the final implementation. Conventionally, this input encoding (IE) problem has been solved in a two-step process. First step generates constraints on the relationship between codes for different symbols...

This paper describes a VHDL implementation of a behavioural model for pipeline analog to digital converters (ADCs). The goal is using this VHDL description to facilitate the synthesis of the digital part, which in our example includes digital correction, digital calibration, and control of the ADC testing modes. Among other aspects of general inter...

This paper presents experimental results corresponding to the use of Oscillation-based Test (OBT) when applied to a switched-capacitor integrated filter. A universal biquad is used as an example to demonstrate the feasibility of the OBT technique

This paper presents practical solutions for two of the main topics arising when applying oscillation-based-test: the start-up of the configured oscillator and the on-chip evaluation of the generated test signals. The required circuitry is very simple and robust. Moreover, preliminary results obtained from an integrated prototype are also included.

This paper presents practical solutions for solving the problems arising when applying the oscillation-based-test to analog integrated circuits. It is devoted to discussing a practical on-chip evaluation of the generated test signals. The required circuitry is very simple and robust. Moreover, preliminary results obtained from an integrated prototy...

Residue threshold functions are a broad class of symmetric functions that include all the unit-weighted threshold functions. In this paper, we investigate the complexity of the Reed–Muller (RM) expressions for these functions. We prove that an important subclass of the functions has very simple RM expansions and determine the conditions that define...

In this paper we state the relationship that output vectors of any true-faulty state pair must satisfy for the fault to be detectable at the primary outputs in one clock cycle. As an application, a new hardware scheme for easily testable PLA-based FSMs is proposed. With our scheme, all combinationally irredundant faults in the PLA which result in u...

This paper presents an optimization algorithm which simultaneously deals with the problems of placement and global routing in an analog macrocell layout style. The optimization process is based on a simulated annealing algorithm. We evaluate the physical placement of the cells and estimate the global routing for each intermediate solution generated...

A new hardware scheme for easily testable PLA-based Finite State Machines is proposed. With our scheme, all combinationally irredundant crosspoint faults in the PLA logic implementation are testable. Moreover, test generation is easily accomplished because short systematic initialization sequences exist for each internal state in the machine and un...

Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column based algorithm to solve this optimization problem. The new algorithm targets economical implementation of face constraints unlike conventional algorithms which do not car...

Frequently, the logic designer deals with functions with symbolic input variables. The binary encoding of such symbols should be chosen to optimize the final implementation. Conventionally, this input encoding problem has been solved in a two step process. First step generates constraints on the relationship between binary codes for different symbo...

Recently different design tasks have been formulated as problems of encoding of symbols but restricted to use a given number of binary variables (Partial Encoding Problems). Up to now specific approaches have been developed only for one type of partial encoding problem: the Partial Input Encoding (PIE) problem and have been shown to produce better...

This paper explores the use of threshold gates for the design of complex logic functions. The usefulness of the approximation is determined by the efficient CMOS realization proposed for the threshold gates. New implementations are presented for two different circuits, the Muller C-element and the Losq's voter for self-purging redundancy, which ill...

This paper presents an small-size fully integrated mixed-signal DTMF receiver. It is able to operate in a wide range of voltage supplies (2.7V to 5V) while the current consumption is virtually fixed and kept small. It contains an smart digital detector and decoder algorithm that provides a very good speech immunity.

Two alternative BIST schemes are proposed for structural testing of pipelined Analog-to-Digital Converters (ADC). They are oriented to fault detection in the converter stages rather than to measure the whole ADC electrical performance parameters. The operational principle of both strategies relies on testing every ADC stage reconfigured as an A/D-D...

The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, the threshold voter. A very efficient implementation of this voter is presented which uses a decomposition technique to substantially reduce the circuit complexity and delay, as compared to alternative implementations.

This paper presents a BIST scheme for the structural testing of pipelined ADCs. The operational principle relies on testing every ADC stage reconfigured as an A/D-D/A block and applying as input a set of analog DC values. These values have been determined as the appropriate and simple stimuli giving a single output signature. A new output signature...

This paper presents two alternative BIST schemes for structural testing of pipelined ADCs. The operational principle of both strategies relies on testing each of the ADC stages reconfigured as an A/D-D/A block and applying as input a set of analog values. These values are DC stimuli giving a simple output signature. The new techniques are intended...

Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/divider circuits can be implemented with a combination o...

Not available Con este trabajo se pretende dar una vision de la situación, dentro del CSIC, de la investigación en Física y en las tecnologías afines a la Física. Se describe la estructura de institutos y centros que se dedican fundamentalmente a investigar en estas materias, introduciendo las principales líneas temáticas sobre las que se trabaja...

A delay model for static CMOS gates with application in gate level logic simulation is presented. It incorporates the degradation effect on narrow pulses and is named PID (pure, inertial and degradation). The results lead to the conclusion that the proposed new delay model maintains the high speed of gate-level logic simulation with a precision com...

This paper proposes a behavioural model for digitally corrected/calibrated pipeline A/D converters (ADCs) based on standard VHDL. We will show how VHDL-based analog modelling can be efficiently used to simulate and verify the functionality of these mixed-signal systems where significant interaction exists between analog and digital parts. The main...

This paper presents a set of guidelines for converting an analog circuit into an oscillator when oscillation-based test is applied to a mixed-signal integrated circuit. Low- and high-level rules are introduced based on experience. An example is used as a vehicle to demonstrate the system-level application of these techniques

This paper presents an operational method for converting into digital the analog waveforms resulting when oscillation-based test (OBT) is applied to a mixed signal integrated circuit. Although our aim is OBT this technique can be used in structural testing in general. A complex mixed-signal macrocell is used as an example to demonstrate the pros an...

Not Available

This paper describes a Design-for-Test (DfT) approach to implement a DTMF embeddable macrocell. The goal is to prove the feasibility of a Built-In-Self-Test (BIST) methodology to mixed-signal ICs. Results from a silicon demonstrator are presented

This paper proposes a methodology for designing sampled-data mixed-signal circuits by using VHDL-based behavioural descriptions. The goal is using a VHDL description of both the analog and the digital part, to simulate and verify the entire mixed-signal system, as well as to facilitate the synthesis and fault simulation of the digital part. As an e...

Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column based algorithm to solve this optimization problem. The new algorithm targets economical implementation of face constraints unlike conventional algorithms which do not car...

Combination of A/D-D/A converters allows im- plementing both long-term analog memory and mul- tiplier/divider operations. An efficient design based on continuous-time, current-mode, dividing-algorith- mic converters is presented in this paper. It offers high-speed and low-voltage operation with low or middle resolution. Experimental results of two...

this paper. The building blocks are designed with mixed-signal currentmode cells that contain low-resolution A/D and D/A converters based on current mirrors. These cells provide the chip with an analog-digital programming interface. They also perform as computing elements of the fuzzy inference engine that calculate the output signal in either anal...

A fuzzy processor is programmed to provide anoptimum output for solving a given problem. It could theoretically solve any problem (from a static point of view) if it is an universal approximator. This paper addresses the design of fuzzy processors aiming at a twofold objective: efficient adaptive approximation of different and even dynamically chan...