Jochen Zimmermann

FZI Forschungszentrum Informatik | FZI · Systementwurf in der Mikroelektronik

European market size for smart home systems is expected to grow by 20% to over 4.3 billion USD by 2017. This growth is mainly due to the development of luxury and premium markets towards a mass market. In 2014, more than one billion mobile devices with Google's operating system Android were sold, which resulted in a market share of more than 80%. T...

In this paper, we present an approach to generate a virtual execution platform in SystemC to advance the development of software-intensive real-time embedded systems including early validation and verification. These virtual execution platforms allow the execution of embedded software with strict consideration of the underlying hardware platform co...

This paper briefly describes the latest achievements of a new functional vehicle system to overcome the range anxiety problem of Fully Electric Vehicles (FEV). This is primarily achieved by integrated control and operation strategies to optimize the driving range. The main focus of these control strategies is cooperated electric drivetrain and rege...

Synchronous dataflow (SDF) models are gaining increased attention in designing software-intensive embedded systems. Especially in the signal processing and multimedia domain, dataflow-oriented models of computation are commonly used by designers reflecting the regular structure of algorithms and providing an intuitive way to specify both sequential...

A vehicle´s basic energy consumption is determined by its design, but the driving behavior is another important factor having a major influence on the overall consumption. In this work we show how information technology can be used to gain an understanding of the whole traffic situation and use it to derive energy optimal behavior. It can be used t...

In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The automated generation of Network-on-Chip architectures covers beside the generation of the communication infrastructure, the automated integration of IP-components. The automate...

In this paper we present an approach for integrating IP components into a general system-level simulation environment by generating tailor-made interfaces and protocol adaptors. With the same methodology we integrate modules modeled for a certain high-level synthesis tool. For modeling systems-on-chip (SoC) interconnects e.g. buses at transaction l...

In this paper, we propose an approach for modeling distributed embedded systems in a holistic way starting from an abstract specification of system requirements. We use the unified modeling language (UML), which is very popular in software modeling and development, for describing both the target platform and the functionality, which has to be perfo...

In this paper, we propose an approach for modeling distributed embedded systems in a holistic way starting from an abstract specification of system requirements. We use the Unified Modeling Language (UML), which is very popular in software modeling and development, for describing both the target plat-form and the functionality, which has to be perf...

In this paper, we present a novel fully adaptive and fault-tolerant routing algorithm for Network-on-Chips (NoCs) called Force-Directed Wormhole Routing (FDWR). The proposed routing algorithm is implemented in the switches of a TLM (Transaction Level Model) packet switching NoC using SystemC. Based on these switches, mesh, torus, and hypercube topo...