Jens Lienig

Jens Lienig
Technische Universität Dresden | TUD · Institute of Electromechanical and Electronic Design

PhD

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196
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Publications

Publications (196)
Chapter
Chapter 8 focuses on timing closure, and its perspective is particularly unique. It offers a comprehensive coverage of timing analysis and relevant optimizations in placement, routing, and netlist restructuring. Timing-driven placement (Sect. 8.3) minimizes signal delays when assigning circuit elements to locations. Timing-driven routing (Sect. 8.4...
Chapter
Chapter 3 is dedicated to chip planning, which includes floorplanning, pin assignment (I/O assignment), and power-ground planning. Floorplanning (Sects. 3.1–3.5) determines the locations and dimensions of the shapes that are the result of partitioning the entire circuit (Chap. 2). Hence, floorplanning produces assigned blocks and enables early esti...
Chapter
Chapter 7 deals with several specialized types of routing which do not conform with the global-detailed paradigm followed by Chaps. 5 and 6. In some types of designs, such as analog circuits and printed circuit boards (PCBs), area routing is applied. Here, the entire area available for interconnections is considered without geometric restrictions,...
Chapter
The routing process determines the precise signal paths for nets on the chip layout. Routing algorithms often adopt a two-stage approach. Global routing first partitions the chip into routing regions and searches for region-to-region paths for all signal nets; this is followed by detailed routing, which determines the exact tracks and vias of these...
Chapter
After partitioning the circuit into smaller modules (Chap. 2) and floorplanning the layout to determine the outlines and positions of blocks and their pin locations (Chap. 3), placement seeks to determine the locations of (standard) cells or logic elements within each block. Placement is subject to multiple optimization objectives, a common one bei...
Chapter
Partitioning divides the circuit into several subcircuits (partitions or blocks) while minimizing the number of connections between partitions. Such partitioning enables each subcircuit to be processed with some degree of independence and parallelism, in stages that follow. Netlist partitioning (Sects. 2.1–2.4) can handle large netlists and can red...
Conference Paper
Full-text available
The reliable operation of ICs is subject to physical effects like electromigration, thermal and stress migration, negative bias temperature instability, hot-carrier injection, etc. While these effects have been studied thoroughly for IC design, threats of their subtle exploitation are not captured well yet. In this paper, we open up a path for secu...
Conference Paper
Full-text available
Recently proposed ambipolar nanotechnologies allow the development of reconfigurable circuits with low area and power overheads as compared to the conventional CMOS technology. However, using a conventional physical synthesis flow for circuits that include gates based on reconfigurable FETs (RFETs) leads to sub-optimal results. This is due to the f...
Article
Studies on further IC development mutually predict that the reliability of future integrated circuits (ICs) will be severely endangered by the occurrence of electromigration (EM). The reason for the increasing number of EM damages are the ongoing structural reductions in the IC. Digital circuits are particularly at risk because they have been negle...
Chapter
Having presented fabrication technology for IC chips in Chap. 2, we now investigate in detail an important aspect of the physical design process: data interfaces. We introduce circuit, layout and mask data structures, that is, the main input and output data in the design steps, in this chapter. First, we explain the input to physical design—circuit...
Chapter
In Chap. 2 we covered technologies and in Chap. 3 we saw how these technologies interface with physical design. Here in Chap. 4 we now provide an end-to-end overview of the physical design process, namely how to physically construct the layout of an electronic circuit. In this chapter we present the fundamental knowledge an engineer must possess to...
Chapter
Reliability of electronic circuits is becoming an increasing concern due to the ongoing downscaling of the structural dimensions and the continuous increase in performance requirements. This final chapter addresses the many options available to a layout designer, given the enormous influence of physical design on circuit reliability. Hence, the goa...
Chapter
While the physical design steps introduced in Chaps. 4 and 5 are universal, analog integrated circuits present further challenges that require additional layout techniques. There are many differences between analog and digital, and as such, the design flows and tools vary in both cases. Analog circuits are generally less complex in terms of transis...
Chapter
Due to its complexity, the physical design process is divided into several primary steps. Having introduced in Chap. 4 the flow, constraints and methodologies of today’s physical design process, we now investigate the various steps required to generate its output: a layout. These steps, which transform a netlist into optimized mask data, are dealt...
Chapter
We discuss the fabrication technologies for IC chips in this chapter. We will focus on the main process steps and especially on those aspects that are of particular importance for understanding how they affect, and in some cases drive, the layout of ICs. All our analyses in this chapter will be for silicon as the base material; the principles and u...
Book
This book covers the fundamental knowledge of layout design from the ground up, addressing both physical design, as generally applied to digital circuits, and analog layout. Such knowledge provides the critical awareness and insights a layout designer must possess to convert a structural description produced during circuit design into the physical...
Chapter
Full-text available
Addressing electromigration (EM) during physical design has become crucial to ensure reliable integrated circuits. Simulation methods, such as the finite element method (FEM), are increasingly overwhelmed by the complexity of the task. With further technology scaling, it is predicted that FEM will not be usable anymore for a full-chip EM analysis d...
Article
Surface acoustic wave (SAW) motors offer great potential due to their high blocking forces, high positioning accuracy and simple design. As established SAW motors have a plane stator made by piezoelectric single crystals, designers have nearly no influence on changing material properties like the friction coefficient or brittleness. Furthermore, th...
Article
Due to the lack of sophisticated component libraries for microelectromechanical systems (MEMS), highly optimized MEMS sensors are currently designed using a polygon-driven design flow. The advantage of this design flow is its accurate mechanical simulation, but it lacks a method for an efficient and accurate electrostatic analysis of parasitic effe...
Conference Paper
Full-text available
Electromigration (EM) is becoming a progressively severe reliability challenge due to increased interconnect current densities. A shift from traditional (post-layout) EM verification to robust (pro-active) EM-aware design - where the circuit layout is designed with individual EM-robust solutions - is urgently needed. This tutorial will give an over...
Article
Hyperspectral imaging (HSI) has become a sophisticated technique in modern applications such as food analyses, recycling technology, medicine, pharmacy and forensic science. It allows one to analyse both spatial and spectral information from an object. But hyperspectral cameras are still expensive due to their extended wavelength range. The develop...
Conference Paper
Full-text available
Electromigration (EM) is becoming a progressively intractable design challenge due to increased interconnect current densities. It has changed from something designers "should" think about to something they "must" think about, i.e., it is now a definite requirement. The on-going IC-down-scaling is producing physical designs with ever-smaller featur...
Article
Due to the lack of sophisticated component libraries for microelectromechanical systems (MEMS), highly optimized MEMS sensors are currently designed using a polygon-driven design flow. The advantage of this design flow is its accurate mechanical simulation, but it lacks a method for analyzing the dynamic parasitic electrostatic effects arising from...
Chapter
This chapter investigates in detail the actual low-level migration processes. A solid grounding in the physics of electromigration (EM) and its specific effects on the interconnect will give us the knowledge to establish effective mitigation methods during the design of integrated circuits. We first explain the physical causes of EM (Sect. 2.1) and...
Chapter
The goal of this chapter is to summarize the state-of-the-art in EM-mitigating effects. Sections 4.2–4.7 describe in detail all known EM-inhibiting effects upon which an “electromigration awareness” is based. We also consider material-related options to reduce EM, like surface passivation (Sect. 4.8), and the use of EM-robust materials, such as car...
Chapter
This chapter summarizes the key findings and results of the book and presents our outlook on future developments. Section 5.1 reiterates the available options and useful measures to prevent electromigration damage in current design flows; it also includes practical guidelines of their application. Sections 5.2–5.5 indicate how to facilitate an elec...
Chapter
This chapter describes measures for modifying the present integrated circuit design methodology with the objective of countering electromigration. After introducing the overall design flow (Sect. 3.1) in use today, we explore how analog and digital designs are differentiated, as both areas require different measures to counter electromigration (Sec...
Book
The book provides a comprehensive overview of electromigration and its effects on the reliability of electronic circuits. It introduces the physical process of electromigration, which gives the reader the requisite understanding and knowledge for adopting appropriate counter measures. A comprehensive set of options is presented for modifying the pr...
Conference Paper
Full-text available
Performance of modern multi-chip modules, increasingly implemented as interposer solutions, is limited by system-level interconnects. We propose an effective method for optimal wirelength-driven die placement of interposer-based 3D ICs. Our key ideas are to leverage the constraint-satisfaction problem (CSP) formalism in combination with a branch-an...
Article
Full-text available
Voltage assignment is a well-known technique for circuit design, and it has been applied successfully to reduce power consumption in classical 2D integrated circuits (ICs). Its usage in the context of 3D ICs has not been fully explored yet although reducing power in 3D designs is of crucial importance, e.g., to tackle the ever-present challenge of...
Conference Paper
Full-text available
System-in-Package is an appealing alternative compared to the integration on a PCB or in a chip. A big variety of different packaging solutions (including 2.5/3D integration) makes it difficult to choose the most appropriate solution for a given specification. Simulation-based design flows gain importance, but lack the straightforward access to act...
Article
Full-text available
Three-dimensional (3D) integration of electronic chips has been advocated by both industry and academia for many years. It is acknowledged as one of the most promising approaches to meet ever-increasing demands on performance, functionality, and power consumption. Furthermore, 3D integration has been shown to be most effective and efficient once la...
Article
Full-text available
With the advance of medium and high power light-emitting diodes (LED), tuneable light sources with sophisticated spectral power distributions have been emerging. The increasing variety of LEDs and their spectral behaviour complicates their design as well. Most notably, many different parameters have to be taken into account to describe the quality...
Chapter
This chapter describes the basics of the development process for electronic systems. We present how service-proven standards and norms along with standard drawings and computer technology can be used to break down the design process into separate activities, which are then more easily performed. We describe these design activities in detail and out...
Chapter
The challenge for designers in today’s waste-disposal-aware society is to produce environmentally compliant systems. This chapter describes critical environmental considerations during the design and development stages that have tremendous impact during product disposal and recycling. We begin with a discussion of the importance of a circular econo...
Chapter
This chapter explains the mathematics needed to perform reliability analysis and introduces the primary reliability parameters, which a development engineer must be familiar with today (Sects. 4.1 and 4.2). The so-called bathtub curve of failure rates is applied for the reliability of electronic systems; understanding the middle of this curve, whic...
Chapter
An important topic in electronic systems design is electromagnetic compatibility (EMC), which concerns the unintentional generation, propagation and reception of electromagnetic energy. Every electronic system must meet mandatory EMC standards. Basic knowledge of EMC-related issues is introduced in Sect. 6.1. Unintentional coupling of circuits are...
Chapter
This chapter introduces system-level functions and structures (Sect. 3.1), design variants (Sect. 3.2), and various technological implementations (i.e., electronic system levels) for a design solution (Sect. 3.3). These implementation options allow a development engineer to identify opportunities for modularization early in the design process to re...
Chapter
Thermal management must ensure that temperatures within the electronic product always remain within the specified limits. This chapter introduces and elaborates on determining the heat energy produced by a system (Sect. 5.1) and on calculating the heat paths with thermal networks (Sect. 5.2). The heat transfer principles described in Sect. 5.3 will...
Book
This textbook covers the design of electronic systems from the ground up, from drawing and CAD essentials to recycling requirements. Chapter by chapter, it deals with the challenges any modern system designer faces: The design process and its fundamentals, such as technical drawings and CAD, electronic system levels, assembly and packaging issues a...
Chapter
Short travel ranges up to approx. 25 mm as in future small machine tools enable linear direct drives with simple single-phase design. Especially designs with moving magnet(s) and an iron core stator winding allow for large actuator constants, i.e. high forces at little losses and small volume. Different types of those compact, dynamic and cost-effe...
Article
We report on the development of a measuring method based on near infrared (NIR) spectroscopy, which is able to determine the thickness as well as the homogeneity of polyurethane lacquer coatings in two dimensions in the field of wind turbine blades. The typical thicknesses of these polyurethane lacquer coatings (50-350 cm) were investigated. NIR sp...
Patent
Full-text available
The invention relates to a gripper comprising two gripper elements (4) which can be moved in a co-ordinated manner with respect to each other by means of an electrodynamic linear direct drive (3), each gripper element (4) comprising an individual linear direct drive (3) and a partial element of the electric linear direct drive (3) being connected t...
Conference Paper
Full-text available
Analog layout design is a predominantly manual task that is extremely difficult, time consuming, and costly. The so-called generator-based design methodology is one possibility to reduce the manual effort by substituting design steps with procedural automation. Recent work already discussed a high degree of technology-independence of procedural gen...
Conference Paper
Full-text available
Current design of analog integrated circuits is still a time-consuming manual process resulting in static analog blocks which can hardly be reused. In order to address this problem, a new framework to ease reuse-centric bottom-up design of analog integrated circuits is introduced. Our IIP Framework (IIP: Intelligent Intellectual Property) enables t...
Conference Paper
Full-text available
In contrast to IC design, MEMS design still lacks sophisticated component libraries. Therefore, the physical design of MEMS sensors is mostly done by simply drawing polygons. Hence, the sensor structure is only given as plain graphic data which hinders the identification and investigation of topology elements such as spring, anchor, mass and electr...
Chapter
Nachdem man die Gesamtschaltung in einzeln zu bearbeitende Schaltungsblöcke zerlegt hat (Partitionierung) und von diesen die Anordnung und die Abmessungen sowie Pinzuordnungen ermittelt wurden (Floorplanning), erfolgt als nächstes die Platzierung der Zellen u.a. Schaltungselemente innerhalb der einzelnen Blöcke.
Chapter
Eine komplexe Gesamtschaltung kann oft nicht auf einem Verdrahtungsträger implementiert werden. Damit ist eine Aufteilung in einzelne Schaltungsblöcke notwendig, die sich dann beispielsweise als separate ICs realisieren lassen. Eine Aufteilung kann auch notwendig sein, um einer vorgegebenen Anzahl von Außenanschlüssen zu entsprechen.
Chapter
Bei dem in Kap. 2 behandelten Partitionierungsschritt wird die Schaltung in unabhängige Teilschaltungen (Partitionen) zerlegt. Aus den dabei den Teilschaltungen zugeordneten Zellen und deren Größen ist die ungefähre Fläche dieser Teilschaltungen bekannt, von der man wiederum ihre möglichen Formen, also Abmessungsbzw. Seitenverhältnisse, ableiten ka...
Chapter
Nach der Platzierung der Zellen u.a. Schaltungselemente erfolgt die Bestimmung der konkreten Verdrahtungsanordnung entsprechend der in der Netzliste festgelegten Zuordnung der Netze zu den Pinanschlüssen.
Chapter
Die Verdrahtung einer Baugruppe schließt sich an die Platzierung an. Sie erfolgt entweder in zwei Schritten (Global- und Feinverdrahtung, s. Kap. 5 und 6), oder sie wird direkt in einem Schritt durchgeführt. In diesem Fall spricht man von Flächenverdrahtung (Area routing), welche Gegenstand dieses Kapitels ist.
Chapter
Nach der Platzierung und Verdrahtung erfolgt oftmals eine Kompaktierung, welche die eigentliche Layoutsynthese abschließt.
Chapter
Die Feinverdrahtung (Detail routing, auch detailed routing bzw. detaillierte Verdrahtung genannt) folgt auf die Globalverdrahtung, um die Verdrahtung damit insgesamt abzuschließen.
Conference Paper
Full-text available
The ongoing shrinking of interconnects in integrated circuits (ICs) induces reliability issues caused by electromigration (EM), including void-induced failure mechanisms in IC vias. We propose a new post-routing approach to insert redundant vias specially targeted for EM avoidance. Our algorithm compares all possible insertions and utilizes the con...
Conference Paper
Full-text available
The concept of 3D chip stacks has been advocated by both industry and academia for many years, and hailed as one of the most promising approaches to meet ever-increasing demands for performance, functionality and power consumption going forward. However, a multitude of challenges has thus far obstructed large-scale transition from "classical" 2D ch...
Article
Full-text available
The volume production of industrial hydrogel sensors lacks a quality-assuring manufacturing technique for thin polymer films with reproducible properties. Overcoming this problem requires a paradigm change from the current recipe-driven manufacturing process to a specification-driven one. This requires techniques to measure quality-determining hydr...
Book
Dieses viel gefragte Buch zur Elektronik-Entwicklung liegt nun in korrigierter zweiter Auflage vor. Es stellt verständlich und anschaulich die Wirkungsweisen und die grundlegenden Algorithmen vor, die „unter der Haube“ von CAD-Systemen für den Layoutentwurf bei Schaltkreisen und Leiterplatten ablaufen. Damit vermittelt das Buch die Fähigkeit, sowoh...
Article
Full-text available
This paper presents a new phenomenological model for magnetic shape memory (MSM) alloy actuators. The model was implemented as a lumped element for multi-domain network models using the Modelica language. These network models are rapidly computed and are therefore well suited for MSM-based actuator design and optimization. The proposed MSM model ac...
Article
Full-text available
Three-dimensional (3D) chips rely on massive interconnect structures, i.e., large groups of through-silicon vias (TSVs) coalesced with large multi-bit buses. We observe that wirelength optimization, a classical technique for floorplanning, is not effective while planning massive interconnects. This is due to the interconnects’ strong impact on mult...
Conference Paper
Full-text available
Designing analog and mixed-signal integrated circuits is still a matter of comprehensive manual tasks. Although a variety of optimization-based and procedural generator-based analog design automation approaches have been presented, they still lack a proper handling of so-called expert knowledge in an abstract way. We present a new method to capture...
Conference Paper
Full-text available
Constraint engineering is one of the key enabling technologies to address robustness and reliability issues in today's IC designs. Design constraints are used to express and verify the customer's demands and the designers intent. These constraints put limits on some design object's parameter values and, hereby, represent additional design informati...
Conference Paper
Full-text available
Physical analog IC design has not been automated to the same degree as digital IC design. This shortfall is primarily rooted in the analog IC design problem itself, which is considerably more complex even for small problem sizes. Significant progress has been made in analog automation in several R&D target areas in recent years. Constraint engineer...
Conference Paper
Full-text available
This paper describes a novel Thermal Management Function (TMF) and its design process developed in the framework of the Clean Sky project. This TMF is capable of calculating optimized control signals in real-time for thermal management systems by using model-based system knowledge. This can be either a physical model of the system or a data record...