Javier García García

Javier García García
Universidad de Las Palmas de Gran Canaria | ULPGC · Instituto Universitario de Microelectrónica Aplicada (IUMA)

PhD

About

70
Publications
5,694
Reads
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81
Citations
Additional affiliations
July 2003 - present
Universidad de Las Palmas de Gran Canaria
Position
  • Professor (Full)
August 2002 - December 2002
Universidad de Navarra
September 1998 - July 2003
Universidad de Las Palmas de Gran Canaria
Position
  • Professor (Associate)
Education
September 1994 - December 2001
Universidad de Las Palmas de Gran Canaria
Field of study
  • Ingeniería de Telecomunicación
October 1986 - June 1993
University of Santiago de Compostela
Field of study
  • Física Electrónica

Publications

Publications (70)
Article
Full-text available
In this paper, a wide-band distributed model that can approximate the behaviour of square and octagonal inductors, both with and without tapering, is presented. This paper also presents a novel way of accurately modelling the lateral coupling in the substrate. The presented model can be applied to any foundry process, and its validity has been demo...
Conference Paper
Full-text available
Different causes of the gate leakage origin in AlGaN/GaN HEMTs on Si have been studied through numerical simulations. Based on DC measured results and employing Sentaurus Device, different trap effects under the Schottky gate must be included to reproduce the measured transfer characteristics in subthreshold regime. Additionally, numerical simulati...
Article
Full-text available
A DC leakage current model accounting for trapping effects under the gate of AlGaN/GaN HEMTs on silicon has been developed. Based on TCAD numerical simulations (with Sentaurus Device), non-local tunneling under the Schottky gate is necessary to reproduce the measured transfer characteristics in a subthreshold regime. Once the trap concentration and...
Article
DC characteristics of AlGaN/GaN on Si single finger MOS-HEMTs, for different gate geometries, have been measured and numerically simulated with substrate temperatures up to 150 °C. Defect density, depending on gate width, and thermal resistance, depending additionally on temperature, are extracted from transfer characteristics displacement and the...
Conference Paper
DC characteristics of AlGaN/GaN on Si MOSHEMTs are measured and numerically simulated, with substrate temperature up to 140ºC, varying the gate width and gate length. Different gate recess depths are simulated in ATLAS in order to further investigate and optimize the device performance. Thermal boundary conditions and device thermal resistance are...
Article
Full-text available
This paper analyses the undoped DG-MOSFETs capability for the operation of rectifiers for RFIDs and Wireless Power Transmission (WPT) at microwave frequencies. For this purpose, a large-signal compact model has been developed and implemented in Verilog-A. The model has been numerically validated with a device simulator (Sentaurus). It is found that...
Conference Paper
Full-text available
AlGaN/GaN HEMTs with sapphire substrate have been measured and numerically simulated considering self-heating effects. A complete DC performance was realized to extract the main electrical parameters with the aim to obtain a proper characterization of the sample. Afterwards, an accuracy and simple methodology has been established to determine the d...
Article
In this paper the N-well resistance in doughnut-shaped PN varactors, with the cathode connected to an N+ buried layer, has been modelled. The proposed expression for the N-well resistance, numerically validated, is based on the device geometry and overlapping of adjacent basic cells, and adequately reproduces its applied reverse bias voltage depend...
Article
In this paper DC characteristics of an AlGaN/GaN on sapphire high-electron mobility transistor (HEMT) are measured, numerically simulated, and modelled accounting for self-heating effects (SHEs), with the main electrical parameters being extracted. Decomposing the transistor thermal resistance into the buffer and substrate components, our study can...
Conference Paper
Full-text available
The objective of this work is to study the possibility of implementing SOI rectifiers for UWB RFIDs with undoped Double Gate MOSFETs (DG-MOSFETs). For that purpose we use two commercial TCAD tools, Sentaurus Device (created by Synopsys) and ADS (created by Agilent), where in a large signal circuit model derived for the transistors is implemented wi...
Conference Paper
The objective of this work is to study the possibility of implementing SOI rectennas for UWB RFIDs, with undoped Double Gate MOSFETs (DG-MOSFETs). For that purpose we use two commercial TCAD tools: Sentaurus Device (created by Synopsys), and ADS (created by Agilent) where in a large signal circuit model derived for the transistors is implemented wi...
Conference Paper
Full-text available
The objective of this work is to study the possibility of implementing SOI rectifiers for UWB RFIDs with undoped Double Gate MOSFETs (DG-MOSFETs). For that purpose we use two commercial TCAD tools, Sentaurus Device (created by Synopsys) and ADS (created by Agilent), wherein a large signal circuit model derived for the transistors is implemented wit...
Article
This article presents a wide range inductance–capacitance voltage controlled oscillator (VCO) with a unit cells-based varactor. The unit cell represents the minimum possible integrated varactor based on p–n junction diodes, where N diffusions are central rectangles, surrounded by doughnut shaped P diffusions, with their respective contacts. The var...
Conference Paper
Variable capacitors, the varactors, are key components in many types of radiofrequency circuits and thus high quality varactors are essential to achieve high quality factors in these devices. This work presents results of a study on the variation of tuning range and quality factor when varying the depth and separation of N+ diffusions in a PN junct...
Conference Paper
In this work varactors based on pn-junction have been connected in parallel with accumulation mode MOS ones, in order to increase the final capacitance without losing the particular characteristics. So, three double varactors have been designed, fabricated and on-wafer measured. Results demonstrate that the combination of these varactors improve th...
Conference Paper
This paper compares different circuit models describing the performance of integrated varactors, which are designed, manufactured, measured and simulated with a 0.35 µm silicon standard technology. Three models are presented, named: simple, capacitive-inductive and physical. Their differences consist on the circuit elements used, capacitances, indu...
Article
This paper is devoted to analyzing varactors based on PN junction cells in order to obtain a capacitance model for radiofrequency (RF) applications. A cell is the minimum structure that can be considered a varactor, including all necessary layers and connections. Then, a specific capacitance for a RF integrated circuit is obtained overlapping all n...
Conference Paper
In this work, varactors based on PN junction cells have been studied in order to obtain a capacitance model for radiofrequency applications. These cells are unit cells: the minimum structure that can be considered a varactor, including all necessary layers and connections. Then, a specific capacitance for a radiofrequency integrated circuit (RFIC)...
Conference Paper
Integrated varactors are key elements in radio frequency integrated circuits. In this paper, several structures of varactors, based on p-n junction cells, are considered. A capacitance model is required to use these structures in a CAD environment. We have developed a model which considers area and perimeter capacitances of adjacent unit cells so a...
Article
Presentación del Proyecto Fin de Carrera titulado "Diseño y Simulación de Circuitos empleando HBTs, orientado a Fibra Óptica"
Conference Paper
The performance of stacked and miniature three-dimensional spiral inductors is analyzed and compared to standard planar coils. For this purpose, nine of these new structures have been fabricated in a 0.35-mum four-metal SiGe process. According to the measurement results, some of the proposed stacked inductors occupy only 48% of the area of a conven...
Conference Paper
In this work, four different structures based on PN junction are studied. These structures are based on changing the geometry of the p+ diffusion. The designed and fabricated devices will be used like integrated varactors in radiofrequency applications. The measures have been made at frequencies since 500 MHz to 10 GHz, and the influence that diffu...
Article
Full-text available
Los transistores más rápidos se consiguen gracias al crecimiento de diferentes semiconductores apilados. Entre los semiconductores es posible confinar una elevada concentración de electrones de alta movilidad, dando lugar a transistores con gran velocidad de respuesta. Cuando se emplea el sistema AlGaN/GaN, los enlaces interatómicos poseen un eleva...
Conference Paper
In this work, a new comprehensive method to extract the inductor equivalent model parameters is developed. Frequency-dependent expressions for the model components are obtained from the simplification of the pi-model Y-parameter equations. By analyzing the influence of the components value on the inductor quality factor and inductance, the frequenc...
Conference Paper
Driven by the many applications that varactors have in RF integrated blocks, this work analyzes the influence of gate geometry (width and length) on integrated accumulation MOS varactors. For this purpose, a number of varactors have been designed and fabricated on a 0.8 mum CMOS standard technology. The most relevant parameters: quality factor, tun...
Article
Full-text available
In this paper the reliability verification in a measurement system of passive components is presented, the passive components measured are integrated varactors. The measurement system used for the characterization of the varactors consists of the HP8719ES Vector Network Analyzer. To calibrate the measurement system, the short-open-load-through (SOL...
Conference Paper
In this paper models for the capacitance of cross integrated varactors based in the PN junction are presented. Three different approximations are assumed, in order to reproduce the measured results of the capacitance. The relative error with the measured capacitance is under 10% in all cases.
Conference Paper
This paper deals with the design and modeling of integrated spiral inductors for RF applications by means of a general purpose Electromagnetic (EM) simulator. These tools allow optimizing flexibly the inductor layout structure. The inductor performance can be obtained by using a three-dimensional design tool or a two-dimensional one. Planar 2-D or...
Conference Paper
In this paper, models for the capacitance of cross integrated varactors based in the PN junction are presented. Three different approximations are assumed, in order to reproduce the measured results of the capacitance. The relative error with the measured capacitance is under 10% in all cases.
Article
This work analyses the dc response of InGaAs channel modulation-doped field-effect transistors, when varying temperature from 300 to 400 K. An analytical model for the intrinsic drain current is derived from previous work, carried out for a similar AlGaAs channel device, in order to show explicitly the temperature dependence. The extrinsic resistan...
Article
Full-text available
Silicon IC technologies have been rarely used for analog applications in radio and microwave frequency ranges but they are the choice in lowering costs. The performance of these ICs strongly depends on the quality of the lumped elements used. There are transistors with cut-off frequencies above 60 GHz and resistors and capacitors suited to operate...
Conference Paper
In this work, new structures based on the PN junction are presented for the design of integrated varactors. In order to optimize the ratio capacitance per unit area (C/A), two varactor geometries have been developed: interdigitated and cross structures. Varactors have been characterized with a specific measurement methodology. A library of varactor...
Article
In this work we propose a modification to the conventional lumped equivalent circuit model for integrated inductors. Also the widely used parametric model is modified. The proposed models expand the frequency range where the integrated inductor behavior is accurately predicted. They are useful in developing automatic tools to assist the designers i...
Conference Paper
This work analyses the DC response of an InGaAs channel PHFET when varying temperature. An analytic model for the drain current is derived from previous work, incorporating the extrinsic resistances. Experimental output characteristics at different temperatures are compared with those offered by the resulting model and numerical simulations. The DC...
Conference Paper
Integrated inductors are key components in Radio Frequency Integrated Circuits (RFICs) because they are needed in several building blocks, such as voltage-controlled oscillators (VCOs), low-noise amplifiers (LNAs), mixers, or filters. The cost reduction, achieved in the circuit assemblage, makes them preferable to Surface Mounted Devices in spite o...
Conference Paper
This contribution reports our research in developing an integrated inductor library. From a tutorial perspective the main limitations of this element, when grown on standard silicon technologies, are presented, offering measured results taken from a set of fabricated inductors and design guidelines to improve their performance. The modeling aspects...
Article
In this paper we are reporting our research in the development of automatic tools to assist the designers in selecting and automatically laying-out integrated inductors. This task is accomplished by analyzing carefully the lumped equivalent circuit model for these passive components, and using different approaches and modifications depending on the...
Article
A model to estimate power consumption in GaAs direct coupled FET logic (DCFL) family, which is based on sensitivity computations, is reported. Comparisons against SPICE simulations show errors smaller than 5% in power consumption estimation, while CPU time is reduced by more than two orders of magnitude
Conference Paper
Full-text available
In this paper skin effect and eddy losses in silicon integrated inductors are carefully studied in order to develop a new physically based fitting model that predicts their behavior by means of closed formulae that depends on geometry and the fabrication process. The computed inductance value has only a ±10% error against measured values taken from...
Article
The use of -doping in HFET processes has made the development of transistor circuits and logic gates possible, for very high-frequency/speed or low-power applications. This behaviour of the PHFET device is due to fast quantum well conduction. However, the effect of the operating temperature range is critical. This range depends on the transistor a...
Article
A study of the operation and performance of ECL and CML families implemented with HBTs has been carried out. We have analyzed, by simulation, the behaviour of both logic families and compared their performances with other high-speed FET based families. As in silicon BJT-based circuits compared with CMOS, the HBT-based families are faster but more p...
Article
Full-text available
This paper presents empirical models to estimate the propagation delay time and power consumed by DCFL digital circuits implemented with HFETs. Model parameters are selected performing sensitivity analysis over SPICE simulations. Sensitivity is also exploited in developing the model equations. A maximum relative error of 7% has been obtained.
Conference Paper
Full-text available
A study of the operation and performance of ECL and CML families implemented with HBTs has been carried out. We have analyzed, by simulation, the behaviour of both logic families and compared their performances with other high-speed FET based families. As in silicon BJT-based circuits compared with CMOS, the HBT-based families are faster but more p...

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