Hui Li

Hui Li
  • PhD (Ecole Centrale de Lyon, France)
  • Current institution: Xidian University

About

42
Publications
2,662
Reads
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239
Citations
Current institution
Current institution: Xidian University

Publications

Publications (42)
Article
Nanophotonic is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices are highly sensitive to temperature variation. Under a given chip activity, this leads to a lower laser efficiency and a drift of wavelengths of optical devices (on-chip lasers and microring re...
Article
Full-text available
Optical network-on-chip (ONoC) is promising to provide higher bandwidth and lower latency, compared with the traditional electrical interconnects at either chip-scale or wafer-scale. There is research on the impact of mapping or wavelength assignment on reliability in ONoC. However, mapping and wavelength assignment have an interactive influence on...
Article
Silicon photonic interconnects on chip is a promising technology for manycore systems, with the characteristics of high bandwidth and low latency. During the communication process from the source to the destination, the optical signal encounters signal losses and crosstalk, which would have a negative influence on the reliability at the destination...
Article
With the development of silicon photonic interconnects, Optical Network-on-Chip (ONoC) becomes promising for multi-core/many-core communication. In ONoCs, both routing and wavelength assignment have an impact on the communication reliability and performance. However, the interactive impact of the routing and wavelength assignment is rarely consider...
Article
https://www.sciencedirect.com/science/article/pii/S0952197624014994?dgcid=author
Article
Full-text available
Silicon photonic interconnects on chip is an emerging technology for future ultra-scale and data-intensive computing chips, e.g., many-core processors, owing to its high transmission speed and low latency. However, in the Wavelength Division Multiplexing (WDM)-based architecture, the communication reliability can be significantly affected by the si...
Article
A large number of optical routers have been proposed for optical network-on-chips (ONoCs). The performance of optical routers is usually evaluated by measurement after fabrication or simulation before fabrication. In simulations, a common method is to set the component performance, such as insertion loss and crosstalk, to fixed values. The performa...
Article
Silicon photonic interconnect is a promising way for Network-on-Chip (NoC) to meet the high-performance computing requirement. Thanks to Wavelength Division Multiplexing (WDM) technology, the bandwidth is greatly improved compared to the tradition electrical interconnect. However, due to the inherent characteristics of silicon photonic devices, the...
Conference Paper
Optical Network-on-Chip (ONoC) is a promising communication architecture which supports multiple communication tasks communicating at the same time at different wavelengths, i.e., Wavelength Division Multiplexing (WDM) technology. However, crosstalk is generated when several signals are transmitting concurrently in a waveguide, which has a negative...
Article
On-chip integrated lasers are key devices to deliver the high bandwidth expected from nanophotonic interconnects. However, lasers are highly sensitive to temperature variation, which influences the lasing efficiency and the wavelengths of emitted optical signals, both of which are key factors in interconnect power efficiency. It is, thus, necessary...
Article
Single-layer optical crossbar interconnections based on Wavelength Division Multiplexing stand among other nanophotonic interconnects because of their low latency and low power. However, such architectures suffer from a poor scalability due to losses induced by long propagation distances on waveguides and waveguide crossings. Multi-layer deposited...
Conference Paper
Optical interconnects are considered to be one of the key solutions for future generation on-chIP interconnects. However, energy efficiency is mainly limited by the losses incurred by the optical signals, which considerably reduces the optical power received by the photodetectors. In this paper we propose a differential transmission of the modulate...
Article
Full-text available
Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Mi...
Conference Paper
Full-text available
The many cores design research community have shown high interest in optical crossbars on chip for more than a decade. Key properties of optical crossbars, namely a) contention-free data routing b) low-latency communication and c) potential for high bandwidth through the use of WDM, motivate several implementations. These implementations demonstrat...
Article
The many-core design research community has shown high interest in optical crossbar on chip for more than a decade. Key properties of optical crossbars, namely (1) contention-free data routing, (2) low latency communication, and (3) potential for high bandwidth through the use of wavelength division multiplexing, motivate several implementations of...
Conference Paper
Optical on-chip interconnects enable significantly increased bandwidth and decreased latency in MPSoC. They are characterized by high static energy and low dynamic energy consumption. Achieving high energy-efficient communication thus requires a certain adaptability degree to the executed application and its communication traffic in order to reduce...
Conference Paper
Full-text available
The next generation of MPSoC points to the integration of thousands of IP cores, requiring high performance interconnect for high throughput communications. Optical on-chip interconnect enables significantly increased bandwidth and decreased latency in MPSoC. However, the interface between electrical and photonic devices implies strong layout const...
Article
Emerging advances in silicon nanophotonics have driven optical interconnect to be a promising method for intra-chip multi-core system. Optical Network-on-Chip (ONoC) can provide high throughput and low latency compared with traditional electrical ones. However, on-chip thermal effect is an inherent characteristic and chip temperature can fluctuate...
Conference Paper
Optical Network-on-Chip (ONoC) architectures are emerging as a new paradigm to interconnect a large number of processing cores at chip level, thereby enabling to meet the pressing demands for extremely high bandwidth and low power consumption. Some existing ONoC architectures are implemented in an electronic-controlled way in a two-layer 3D chip ba...
Article
The increasing number of Intellectual Property (IP) cores challenges the traditional electrical Network on Chip (NoC); Silicon nanophotonics becomes a leading technology because of offering several benefits for NoC. Also, On-chip services, in:cluding guaranteed service and best-effort service, have different traffic characteristics. This has an imp...
Article
Optical interconnect is a promising alternative to substitute the electrical interconnect for intra-chip communications. The topology of optical Network-on-Chip (ONoC) has a great impact on the network performance. However, the size of ONoC is limited by the power consumption and crosstalk noise, which are mainly resulted from the waveguide crossin...
Article
To address the problems that traditional electrical interconnects face in the aspects of bandwidth and delay, a hierarchical cluster-based optical network on chip, called the HCONoC for short, was proposed based on the optical packet switching mechanism. The topology, layout, and the methods of node addressing and scalability method were designed f...
Article
A fast mapping algorithm, named Topology Partition Based MAPping (TPBMAP), is proposed considering the energy consumption and traffic balance for the Network-on-Chip (NoC). The proposed algorithm not only generates topology automatically by taking the characteristic of chip layout into consideration, but also achieves the mapping when the number of...
Article
Tens, hundreds and even thousands of cores are to be integrated into a single chip. Network on chip appears to offer efficient communication between cores. However, the increased requirement for larger communication bandwidths and lower power consumption challenges the traditional electrical interconnects. Advances in silicon nanophotonics make opt...

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