C. FAYOMI

University of Quebec in Montreal | UQAM · Department of Computer Science

The demand for analog and mixed-signal integrated circuits has increased significantly in the last decades, although we have been living in a “digital era”. One of the reasons for such high demand is simply explicated by the increase of devices in our daily life. Such scenario can be simply called as “Ubiquitous computing” and/or the Internet of Ev...

In this paper, a reconfigurable successive approximation analog-to-digital converter with selectable resolutions ranging from 7 to 10 bits is presented. The circuit is implemented in IBM CMOS 0.13 μm technology, and operates with a 0.9 V supply. The simulated effective number of bits (ENOB) ranges from 6.66 to 9.75, while the simulated power consum...

This work presents a curvature correction method using a subthreshold current generated by an NMOS transistor with its gate and source connected. The designed BGR, used as case study, achieves a simulated temperature coefficient of 5.9 ppm/°C, while the conventional circuit achieves only 17.5 ppm/°C — the triple of the output voltage variation in t...

This paper presents an analog design methodology, which uses the selection of the inversion coefficient of MOS devices, to design low-voltage and low-power (LVLP) CMOS voltage references. The motivation of this work comes from the demand for analog design methods that optimize the sizing process of transistors working in subthreshold operation. The...

The design and characterization of a low-voltage, high-speed CMOS analog latched voltage comparator based on the flipped voltage follower (FVF) cell and input signal regeneration is presented. The proposed circuit consists of a differential input stage with a common-mode signal detector, followed by a regenerative latch and a Set–Reset (S–R) latch....

We previously proposed in [1] a novel standalone fluorescence measurement device that can identify fluorophore substances in a light conducting environment. In this paper, we adapt this work to the particular problem of predicting blood glucose levels based on near-infrared (NIR) absorption spectroscopy. We have focused this investigation on the co...

This paper presents the design and analysis of a low-voltage down-conversion mixer in 0.18-μm CMOS for baseband frequency-domain ultra wide band SATCOM systems analog-to-digital conversion. The folded topology allows the transconductance and Local Oscillator (LO) stages to have different bias current. Consequently, the mixer implements a two-pole l...

A method for linearity correction of a three-transistor wide dynamic range current-mode active pixel sensor is proposed. The pixel uses a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a liner-logarithmic response. One of the non-linearity contributions is the effect caused by the `on' resistan...

In this work, a very robust quadrature time-domain CMOS front-end for transform-domain UWB WLAN receiver has been presented, showing 1-dB desensitization point as high as 2dBm, with 27dB narrow-band conversion gain, and 35dBc interferer rejection, witch helps minimizing the loss of orthogonality effect, introduced by the short windowing, in the ana...

This paper presents a review of constraints, limitation factors and challenges to implement sub 1V CMOS bandgap voltage reference (BVR) circuits in today’s and future submicron technology. Moreover, we provide insight analysis of BVR circuit architectures a designer can relay upon when building CMOS voltage reference.

We report on the design and implementation of a fluorescence measurement and analysis device that can identify fluorophore substances. The device performs multi-spectral fluorescence measurements, obtained by exciting the unknown substance with light emitting diodes (LED) whose intensity is CDMA coded for noise rejection. The acquired fluorescence...

An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation (SA) analog-to-digital converter (ADC) implemented in a standard CMOS 0.18 μm digital process is presented. To overcome the input sampling switches limitation imposed by the low supply voltage we make use of a track-and-hold circuit based on a low-vol...

This paper presents an analog design methodology, using the selection of inversion coefficient of MOS devices, to design low voltage and low-power (LVLP) CMOS voltage references. These circuits often work under subthreshold operation. Hence, there is a demand for analog design methods that optimize the sizing process of transistors working in weak...

This paper addresses the selectivity problem, for the ultra-wide band (UWB), transform-domain receiver loss of orthogonality. A novel selective time-domain direct-sequence front-end for transform-domain ultra-wideband (UWB) wireless local area network (WLAN) receiver is proposed. The architecture comprises a multi-block, linear, dynamic feedback lo...

This paper concerns a novel analog front-end of a wireless brain oxymeter smart sensoring instrument based on near-infrared spectroreflectometry (NIRS). The NIRS sensor makes use of dynamic threshold transistors (DTMOS) for low voltage (1 V), low power and low noise enhancement. The design is composed of a transimpedance amplifier (TIA) and an oper...

This paper presents the design and preliminary results of a full differential sample-and-hold circuit based on the "flipped voltage follower" (FVF) cell. The heart of this circuit is a fully differential low-voltage OTA based on FVF technique. The use of the FVF reduces the supply power requirements in the OTA. To overcome input sampling switches l...

Mismatch and noise may impact the performance of integrated Bandgap voltage references. A usual solution to mitigate the impact of mismatch on performance is to include a trim circuit in the design. This technique results in more die area and longer test times. If the trim range is reduced, area and test time may be saved. Other factor that may als...

Radiation effects, particularly single event transients (SETs), are increasingly affecting the reliability of integrated circuits as device dimensions are scaling down. This paper presents the use of bulk built in current sensors (Bulk-BICS) for SET detection. The efficiency and applicability of the bulk-BICS approach for Single Event Transient det...

This paper presents the design and preliminary results of a sample-and-hold circuit based on a novel implementation of a dynamic threshold MOS (DTMOS) hybrid compensated folded OTA. The heart of this circuit is a new low-voltage fully-differential hybrid cascode compensated DTMOS folded OTA. The use of DTMOS reduces the input/output common mode req...

We report a novel low voltage fully differential class AB operational amplifier and a fully balanced preamplifier, which are based on Dynamic Threshold voltage MOSFET (DTMOS) transistors. Pseudo P type DTMOS transistors are used to enhance the differential input common-mode range. The proposed circuits were fabricated using standard CMOS 0.18μm CMO...

This paper presents a novel approach to the design and post-layout simulation results of a low-voltage and low-power bandgap reference voltage in standard CMOS process. The proposed circuit makes use of a positive-and negative-temperature coefficient PTAT summed up to a resistive load to generate a low TC bandgap output reference voltage. Hspice-ba...

In this paper, we describe a novel low-voltage class-AB operational amplifier (opamp) based on dynamic threshold voltage MOS transistors (DTMOS). A DTMOS transistor is a device whose gate is tied to its bulk. DTMOS transistor pseudo-pMOS differential input pairs are used for input common-mode range enhancement, followed by a single ended class-AB o...

SUMMARY This paper concerns the design, implementation and sub- sequent experimental validation of a low-voltage analog CMOS switch based on a gate-bootstrapped method. The main part of the proposed circuit is a new low-voltage and low-stress CMOS clock voltage doubler. Through the use of a dummy switch, the charge injection induced by the boot- st...

In this paper, the authors described a novel class AB opamp based on dynamic threshold voltage transistors (DTMOS) for low voltage (1-V), low power and low noise applications. The opamp is used to build the front-end receiver part of a near infrared spectroreflectometry (NIRS) device. The opamp has a two-stage configuration; DTMOS pseudo pMOS diffe...

This paper presents the design and characterization of a sample-and-hold circuit based on a novel implementation of the bootstrapped low-voltage analog CMOS switch. The heart of this circuit is a new low-voltage and low-stress CMOS clock voltage doubler. Through the use of a dummy switch, the charge injection induced by the bootstrapped switch is g...

We have developed a novel analog front-end part of a wireless brain oxymeter receiver instrument based on near-infrared spectroreflectometry (NIRS). The NIRS receiver makes use of dynamic threshold transistors (DTMOS) for low voltage (1–V), low power and low noise enhancement. The design is composed of a transimpedance amplifier (TIA) and an operat...

This paper deals with design and characterization techniques of a low-voltage CMOS analog switch to be used in sample-data circuits. Hspice simulation-based simple design procedure and a characterization method are presented. The switch on-resistance, the error voltage caused by charge injection and clock feedthrough as well as non-linear distortio...

We present in this paper an overview of circuit techniques dedicated to design reliable low-voltage (1-V and below) analog functions in deep submicron standard CMOS processes. The challenges of designing such low-voltage and reliable analog building blocks are addressed both at circuit and physical layout levels. State-of-the-art circuit topologies...

In this paper, we present a new opamp based on dynamic threshold voltage (DTMOS) transistors for low voltage applications (1 V). The opamp is a two stage configuration, with differential input pairs followed by a single ended class AB output. The input stage uses DTMOS devices for input common-mode range enhancement. The performed simulation shows...

A design strategy for a rail-to-rail input/output operational amplifier in standard CMOS 0.18 μm digital process with a 0.5-V threshold is presented. It uses a novel level shifting technique of the input signal and a dynamically biased class AB output stage based on a switched-capacitor configuration. The amplifier is capable of working with a powe...

Two architectures for a 1-V, 10-bit 200-kS/s successive approximation analog-to-digital converter (ADC) implemented in a standard CMOS 0.18 μm digital process are presented. A track-and-hold circuit based on a novel implementation of the bootstrapped low-voltage analog CMOS switch with a novel rail-to-rail track-and-latch comparator circuit is desc...

A new CMOS differential latched comparator suitable for low voltage, low-power application is presented. The circuit consists of constant-gm rail-to-rail common-mode operational transconductance amplifier followed by a regenerative latch in a track and latch configuration to achieve a relatively constant delay. The use of a track and latch minimize...

This paper presents a sample-and-hold circuit based on a novel implementation of the bootstrapped low-voltage analog CMOS switch. The heart of this circuit is a new low-voltage and low-stress CMOS clock voltage doubler. Through the use of a dummy switch, the charge injection induced by the bootstrapped switch is greatly reduced resulting in improve...

A new current-mode 2-bit pipelined ADC's cell is presented. Its potential advantages are high-speed, low power/voltage, continuous time mode conversion, less circuit complexity and less die area. A novel cell circuitry based on current-mode has been designed. Primary results of HSPICE simulation show that an 8-bit resolution under 5-V single supply...