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Arthur Lombardi Campos

Arthur Lombardi Campos
  • Master of Science
  • Analog IC Design Engineer at Semron GmbH

Analog/Mixed-Signal IC Design

About

9
Publications
5,708
Reads
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121
Citations
Introduction
Arthur Lombardi Campos received the B.S. degree in electrical engineering from the Centro Universitário FEI in 2014, with a sandwich period in the University of Porto, and the M.S. degree in electrical engineering from the University of São Paulo (USP) at São Carlos School of Engineering in 2020. He was Analog/Mixed Signal IC design engineer at LSI-TEC Design House for 3 years, Analog IC Layout Engineer at Chipus Microelectronics for 3 years and former researcher at the University of São Paulo.
Current institution
Semron GmbH
Current position
  • Analog IC Design Engineer
Additional affiliations
November 2020 - January 2024
Chipus Microelectronics
Position
  • Analog IC Layout Engineer
March 2020 - May 2020
LSI-TEC
Position
  • Engineer
Description
  • Test and characterization of the new version of the SAMPA chip (ASIC for read-out front-end electronics), funded by the Brookhaven National Laboratory (BNL), NY, for the PHENIX experiment
June 2017 - October 2019
LSI-TEC
Position
  • Engineer
Description
  • Firmware design of embedded systems for smart grid communication layer. (Cortex-M3 processor family)
Education
August 2017 - September 2020
University of São Paulo
Field of study
  • Electrical Engineering
September 2012 - July 2013
University of Porto
Field of study
  • Electrical Engineering
August 2008 - July 2014
University Center of FEI
Field of study
  • Electrical Engineering

Publications

Publications (9)
Article
Conseil Européen pour la Recherche Nucléaire is currently undergoing a major upgrade within the A Large Ion Collider Experiment (ALICE) detectors, one of the four main experiments at the Large Hadron Collider (LHC) accelerator. The LHC luminosity will increase making the heavy ions collision rate rise from 500 Hz to 50 kHz. Both the time projection...
Article
Full-text available
During the last decades we have witnessed the performance improvement and the aggressive growth of the complexity of integrated circuits (ICs). The progressive size reduction of transistors in recent technological nodes has allowed and even compelled IC designers to perform analog tasks in the digital domain, increasing the demand for analog-to-dig...
Thesis
Full-text available
This work presents the design of a low-power 10-bit 12-MS/s Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) in 65-nm technology, suitable for IEEE 802.15.4g standard frontend receivers (low data rate and power consumption smart utility networks). By using the differential implementation with a pair of boot-strapped switche...
Article
Full-text available
The upgrade of the ALICE TPC will allow the experiment to cope with the high interaction rates foreseen for the forthcoming Run 3 and Run 4 at the CERN LHC. In this article, we describe the design of new readout chambers and front-end electronics, which are driven by the goals of the experiment. Gas Electron Multiplier (GEM) detectors arranged in s...
Article
Full-text available
A Large Ion Collider Experiment (ALICE) has been conceived and constructed as a heavy-ion experiment at the LHC. During LHC Runs 1 and 2, it has produced a wide range of physics results using all collision systems available at the LHC. In order to best exploit new physics opportunities opening up with the upgraded LHC and new detector technologies,...
Preprint
Full-text available
The upgrade of the ALICE TPC will allow the experiment to cope with the high interaction rates foreseen for the forthcoming Run 3 and Run 4 at the CERN LHC. In this article, we describe the design of new readout chambers and front-end electronics, which are driven by the goals of the experiment. Gas Electron Multiplier (GEM) detectors arranged in s...
Conference Paper
Full-text available
During the last decades we have witnessed the performance improvement and the aggressive growth of the complexity of integrated circuits (ICs). The progressive size reduction of transistors in recent technological nodes has allowed IC designers to perform analog tasks in the digital domain, increasing the demand for analog-to-digital converters (AD...
Poster
Full-text available
This work performs, for the first time, a comparative study between the die areas of two inverter gates, where the first one is implemented with conventional p-type and n-type MOSFFETs (rectangular gate geometries) and the second one is implemented with a conventional p-type MOSFET and a FISH n-type MOSFET (hybrid inverter layout) in order to verif...
Poster
Full-text available
Neste trabalho o aluno estuda o processo de fabricação de circuitos integrados da AMS de 0.35µm, através do programa educacional do MOSIS, e utiliza o software IC Station para o desenvolvimento das máscaras em geometria convencional e Fish. Fabricados, seguindo as regras de processo, os leiautes serão caracterizados no laboratório do Centro Univers...

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