Ahmed Hareedy

Ahmed Hareedy
Middle East Technical University | METU · Department of Electrical and Electronics Engineering

Doctor of Philosophy

About

61
Publications
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355
Citations
Introduction
Ahmed Hareedy currently works with the Department of Electrical and Electronics Engineering at Middle East Technical University (METU) as an Assistant Professor. Ahmed does research in coding theory and information theory, aiming at enhancing the performance of data-hungry applications.

Publications

Publications (61)
Article
Full-text available
Constrained codes are used to prevent errors from occurring in various data storage and data transmission systems. They can help in increasing the storage density of magnetic storage devices, in managing the lifetime of solid-state storage devices, and in increasing the reliability of data transmission over wires. Over the years, designing practica...
Preprint
Full-text available
The pivotal storage density win achieved by solid-state devices over magnetic devices in 2015 is a result of multiple innovations in physics, architecture, and signal processing. One of the most important innovations in that regard is enabling the storage of more than one bit per cell in the Flash device, i.e., having more than two charge levels pe...
Preprint
Full-text available
Spatially-coupled (SC) codes, known for their threshold saturation phenomenon and low-latency windowed decoding algorithms, are ideal for streaming applications and data storage systems. SC codes are constructed by partitioning an underlying block code, followed by rearranging and concatenating the partitioned components in a convolutional manner....
Article
Full-text available
In various practical systems, certain data patterns are prone to errors if written or transmitted. In magnetic recording and communication over transmission lines, data patterns causing consecutive transitions that are not sufficiently separated are prone to errors. In Flash memory with two levels per cell, data patterns causing high–low–high charg...
Preprint
Full-text available
Computational storage, known as a solution to significantly reduce the latency by moving data-processing down to the data storage, has received wide attention because of its potential to accelerate data-driven devices at the edge. To meet the insatiable appetite for complicated functionalities tailored for intelligent devices such as autonomous veh...
Preprint
Full-text available
Spatially-coupled (SC) codes, known for their threshold saturation phenomenon and low-latency windowed decoding algorithms, are ideal for streaming applications. They also find application in various data storage systems because of their excellent performance. SC codes are constructed by partitioning an underlying block code, followed by rearrangin...
Preprint
Full-text available
Because of their capacity-approaching performance, graph-based codes have a wide range of applications, including communications and storage. In these codes, unequal error protection (UEP) can offer performance gains with limited rate loss. Recent empirical results in magnetic recording (MR) systems show that extra protection for the parity bits of...
Preprint
Full-text available
Constrained codes are used to prevent errors from occurring in various data storage and data transmission systems. They can help in increasing the storage density of magnetic storage devices, in managing the lifetime of electronic storage devices, and in increasing the reliability of data transmission over wires. We recently introduced families of...
Article
Full-text available
Flash memory devices are winning the competition for storage density against magnetic recording devices. This outcome results from advances in physics that allow storage of more than one bit per cell, coupled with advances in signal processing that reduce the effect of physical instabilities. Constrained codes are used in storage to avoid problemat...
Preprint
Full-text available
Constrained codes are used to eliminate error-prone patterns in various practical systems. Recently, we introduced efficient binary symmetric lexicographically-ordered constrained (LOCO) codes and asymmetric LOCO (A-LOCO) codes to increase density in magnetic recording systems and lifetime in Flash systems by eliminating the relevant detrimental pa...
Preprint
Full-text available
In order to accommodate the ever-growing data from various, possibly independent, sources and the dynamic nature of data usage rates in practical applications, modern cloud data storage systems are required to be scalable, flexible, and heterogeneous. The recent rise of the blockchain technology is also moving various information systems towards de...
Article
Full-text available
The two-dimensional magnetic recording (TDMR) technology promises storage densities of 10 Tbits/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . However, when tracks are squeezed together, a bit stored in the two-dimensional (TD) grid suffers inter-symbol interference (ISI) from adjacent bi...
Preprint
Full-text available
The two-dimensional magnetic recording (TDMR) technology promises storage densities of $10$ terabits per square inch. However, when tracks are squeezed together, a bit stored in the two-dimensional (TD) grid suffers inter-symbol interference (ISI) from adjacent bits in the same track, and inter-track interference (ITI) from nearby bits in the adjac...
Article
Full-text available
The increasing demand for access to data has led to dramatic increases in data storage densities, and as densities increase, new sources of error appear. Multi-dimensional (MD) graph-based codes are capable of mitigating error sources like interference and channel non-uniformity in dense storage devices. A recent innovation improves the performance...
Article
Full-text available
Because of their capacity-approaching performance and their complexity/latency advantages, spatially-coupled (SC) codes are among the most attractive error-correcting codes for use in modern dense data storage systems. SC codes are constructed by partitioning an underlying block code and coupling the partitioned components. Here, we focus on circul...
Preprint
Full-text available
From currency to cloud storage systems, the continuous rise of the blockchain technology is moving various information systems towards decentralization. Blockchain-based decentralized storage networks (DSNs) offer significantly higher privacy and lower costs to customers compared with centralized cloud storage associated with specific vendors. DSNs...
Preprint
Full-text available
Flash memory devices are winning the competition for storage density against magnetic recording devices. This outcome results from advances in physics that allow storage of more than one bit per cell, coupled with advances in signal processing that reduce the effect of physical instabilities. Constrained codes are used in storage to avoid problemat...
Article
Full-text available
Line codes make it possible to mitigate interference, to prevent short pulses, and to generate streams of bipolar signals with no direct-current (DC) power content through balancing. They find application in magnetic recording (MR) devices, in Flash devices, in optical recording devices, and in some computer standards. This paper introduces a new f...
Preprint
Full-text available
In data storage and data transmission, certain patterns are more likely to be subject to error when written (transmitted) onto the media. In magnetic recording systems with binary data and bipolar non-return-to-zero signaling, patterns that have consecutive transitions exacerbate inter-symbol interference. Constrained codes are used to eliminate su...
Preprint
Full-text available
In order to accommodate the ever-growing data from various, possibly independent, sources and the dynamic nature of data usage rates in practical applications, modern cloud data storage systems are required to be scalable, flexible, and heterogeneous. Codes with hierarchical locality have been intensively studied due to their effectiveness in reduc...
Preprint
Full-text available
In order to meet the demands of data-hungry applications, data storage devices are required to be denser. Various sources of error appear with this increase in density. Multi-dimensional (MD) graph-based codes are capable of mitigating error sources like interference and channel non-uniformity in dense storage devices. Recently, a technique was pro...
Preprint
Full-text available
Line codes make it possible to mitigate interference, to prevent short pulses, and to generate streams of bipolar signals with no direct-current (DC) power content through balancing. Thus, they find applications in magnetic recording (MR) devices, in Flash devices, in optical recording devices, in addition to some computer standards. This paper int...
Thesis
Full-text available
In order to meet the demands of data-hungry applications, modern data storage systems are expected to be increasingly denser. This is a challenging endeavor, and storage engineers are continuously trying to provide novel technologies. However, these new technologies are typically associated with an increase in the number and types of errors, making...
Preprint
Full-text available
Because of their capacity-approaching performance and their complexity/latency advantages, spatially-coupled (SC) codes are among the most attractive error-correcting codes for use in modern dense storage devices. SC codes are constructed by partitioning an underlying block code and coupling the partitioned components. Here, we focus on circulant-b...
Preprint
Full-text available
A circulant-based spatially-coupled (SC) code is constructed by partitioning the circulants of an underlying block code into a number of components, and then coupling copies of these components together. By connecting (coupling) several SC codes, multi-dimensional SC (MD-SC) codes are constructed. In this paper, we present a systematic framework fo...
Article
In magnetic recording systems, consecutive sections experience different signal-to-noise ratios (SNRs). To perform error correction over these systems, one approach is to use an individual block code for each section. However, the performance over a section affected by a lower SNR is weaker compared to the performance over a section affected by a h...
Article
Full-text available
Because of their capacity-approaching performance and their complexity/latency advantages, spatially-coupled (SC) codes are among the most attractive error-correcting codes for use in modern dense storage devices. SC codes are constructed by partitioning an underlying block code and coupling the partitioned components. Here, we focus on circulant-b...
Article
Full-text available
In magnetic-recording systems, consecutive sections experience different signal to noise ratios (SNRs). To perform error correction over these systems, one approach is to use an individual block code for each section. However, a section affected by a lower SNR shows a weaker performance compared to a section affected by a higher SNR. A commonly use...
Article
Full-text available
Spatially-coupled (SC) codes are a family of graph-based codes that have attracted significant attention thanks to their capacity approaching performance and low decoding latency. An SC code is constructed by partitioning an underlying block code into a number of components and coupling their copies together. In this paper, we first introduce a gen...
Conference Paper
Full-text available
Modern dense Flash memory devices operate at very low error rates, which require powerful error correcting coding techniques. Here, our focus is on spatially-coupled (SC) codes. We present a three-stage approach for the design of high performance non-binary SC (NB-SC) codes optimized for practical Flash channels; we aim at minimizing the number of...
Article
Full-text available
Modern dense Flash memory devices operate at very low error rates, which require powerful error correcting coding (ECC) techniques. An emerging class of graph-based ECC techniques that has broad applications is the class of spatially-coupled (SC) codes, where a block code is partitioned into components that are then rewired multiple times to constr...
Article
Full-text available
Non-binary (NB) low-density parity-check (LDPC) codes are graph-based codes that are increasingly being considered as a powerful error correction tool for modern dense storage devices. Optimizing NB-LDPC codes to overcome their error floor is one of the main code design challenges facing storage engineers upon deploying such codes in practice. Furt...
Conference Paper
Full-text available
Transmission channels underlying modern dense storage systems, e.g., Flash memory and magnetic recording (MR) systems, significantly differ from canonical channels, like additive white Gaussian noise (AWGN) channels. While existing low-density parity-check (LDPC) codes optimized for symmetric, AWGN-like channels are being actively considered for Fl...
Conference Paper
Spatially-coupled (SC) codes have recently attracted significant attention due to their capability to achieve capacity approaching performance. Significant recent research has been devoted to the asymptotic study of SC codes. Although the asymptotic analysis is relevant, it cannot be directly applied in the finite-length setting due to cycle-free a...
Article
Full-text available
Spatially-coupled (SC) codes are a class of sparse graph-based codes known to have capacity-approaching performance. SC codes are constructed based on an underlying low-density parity-check (LDPC) code, by first partitioning the underlying block code and then putting replicas of the components together. Significant recent research efforts have been...
Article
Full-text available
Transmission channels underlying modern dense storage systems, e.g., Flash memory and magnetic recording (MR) systems, significantly differ from canonical channels, like additive white Gaussian noise (AWGN) channels. While existing low-density parity-check (LDPC) codes optimized for symmetric, AWGN-like channels are being actively considered for Fl...
Article
Full-text available
In this paper, we provide a comprehensive analysis of the error floor along with code optimization guidelines for structured and regular non-binary low-density parity-check (NB-LDPC) codes in magnetic recording (MR) applications. While the topic of the error floor performance of binary LDPC codes over additive white Gaussian noise (AWGN) channels h...
Conference Paper
Full-text available
Transmission channels underlying modern memory systems, e.g., Flash memories, possess a significant amount of asymmetry. While existing LDPC codes optimized for symmetric, AWGN-like channels are being actively considered for Flash applications, we demonstrate that, due to channel asymmetry, such approaches are fairly inadequate. We propose a new, g...
Conference Paper
Full-text available
The increasing number of bits per cell and the decreasing size of NAND flash memory has led to a dramatic reduction in lifetime. In order to compensate for a relatively high level of raw bit errors, more powerful error correcting codes must be used. Non-binary low-density parity-check codes (NB-LDPC) have been shown to outperform binary LDPC codes...
Article
Full-text available
With the growing importance of error correction in different communication systems, using an efficient and easily implementable code is always appreciated. One of the most important codes is the low-density parity-check (LDPC) code. Two main iterative decoding algorithms are usually used, namely the sum-product (SP) algorithm (also referred to as b...
Thesis
Full-text available
With the growing importance of error correction in different communication systems, using an efficient and easily implementable code is always appreciated. Two main iterative decoding algorithms are usually used for the important class of codes known as low density parity check (LDPC) codes; namely the sum-product (SP) algorithm and the min-sum (MS...
Conference Paper
In this paper, we introduce the design of an IP processor core code-named CUSPARC for Cairo university SPARC processor. This core is a 32 bit pipelined processor that conforms to SPARC v8 ISA. It is complete with 4 register windows, I and D caches, SRAM and flash memory controller, resolution hardware for the data and branch hazards, interrupts and...
Conference Paper
In this paper, we introduce the design of an IP processor core code-named CUSPARC for Cairo university SPARC processor. This core is a 32 bit pipelined processor that conforms to SPARC v8 ISA. It is complete with 4 register windows, I and D caches, SRAM and flash memory controller, resolution hardware for the data and branch hazards, interrupts and...
Conference Paper
Full-text available
IBIS4.2 (I/O Buffer Information Specification) standard describes the hysteresis behavior from one simulation point to the other. In an analog simulator, solution is obtained based on multiple iterations in between simulation points. These iterations can lead to undesired behavior. The common problem that might be encountered with this specific beh...

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Projects

Projects (8)
Project
Constructing codes for cloud storage systems that guarantee efficient local and global error-correction capability.
Project
Devising novel constrained codes to improve the performance in data storage and computer systems.
Project
This research is focused on device modeling and SPARC processors.