This is a TD document for the EURACON COST meeting (European Association for Communications andNetworking).

Estimating the Direction-of-Arrival (DoA) of radio-frequency sources is essential in many wireless applications. Traditional DoA estimation based on bearing measurements requires multi-antenna arrays, which is not suitable for portable electronics for its large form factor. In this paper, we improved a novelty single-antenna-based DoA estimation technique, called virtual multi-antenna arrays. While the device is moving and continuously receiving signals, the DoA can be estimated by measuring the intercepted signals at several positions along the receiver’s trajectory. Previous virtual array technology left two unsolved problems: some receiver movements are not able to estimate the DoA, without a theoretical basis to screen feasible trajectories; the virtual array requires precise, relative coordinates of the receiver, which is challenging in reality. This paper investigates the feasibility of the virtual array and improves its robustness by addressing these two unsolved problems. A theoretical foundation for feasible receiver trajectory determination is provided: the receiver has to move with accelerations to make the DoA observable. Also, we prove the nature that the DoA could be estimated by measuring the accelerations only, where precise receiver position is not mandatory. These results indicate that the virtual array is feasible with simple receiver movements and low-cost commercial equipment, thus significantly reducing system complexity and cost. Simulations are conducted to validate our theoretical predictions. The proof of concept implemented on a software-defined radio testbed also proves the validity and suitability of the improved DoA estimation technology in applications with form factor constraints.

3D stacked ICs package multiple, independently manufactured dies to reduce total system wire-length, improve timing, and reduce area and power. When designing stacked 3D-ICs, arises the question of the grain at which one should consider system partitioning to optimize the gains. This work uses known MAX-CUT graph partitioning algorithms to split designs from 42k up to 800k gates, with gates clustered from 8 and up to 32768 partitions. It has been found that with 2048 clusters, i.e. 20 to 400 gates per cluster depending on the design, a partitioning of the system allows on average to cut 35% of the nets that account for 73% of the total wire-length in 3D.