Journal of Electrostatics

An approach to the generation of gas phase ions by field extraction from liquid solutions has been investigated. The method uses a polymer membrane with nano-size channels as an interface between the liquid and the atmospheric pressure gas. Ions are produced by dissociation in the polar solvent and secondary ion-molecular reactions in the solution, which fills the channels of the membrane. Field extraction of the ions from the channels is stimulated by pulses of the electric discharge between the membrane and an adjacent electrode in the gas. The gas-phase ions are removed from the extraction zone by air flow and are detected by mass spectrometry. Possibilities of the membrane interface for generation of gas phase ions have been demonstrated from mass spectral investigation curried out for angiotensin II, gramicidin S and cytochrome C solutions. The current kinetics of the membrane ion source has been investigated to elucidate the mechanism of the ion extraction.

The objective of this study was to investigate the electrical impedance properties of rat lung and other tissues ex vivo using Electrical Impedance Spectroscopy. Rat lungs (both electroporated and naïve (untreated)), and mesenteric vessels (naïve) were harvested from male Sprague-Dawley rats; their electrical impedance were measured using a Solartron 1290 impedance analyzer. Mouse lung and heart samples (naïve) were also studied. The resistance (Real Z, ohm) and the reactance (Im Z, negative ohm)) magnitudes and hence the Cole-Cole (Real Z versus Im Z) plots are different for the electroporated lung and the naive lung. The results confirm the close relationship between the structure and the functional characteristic. These also vary for the different biological tissues studied. The impedance values were higher at low frequencies compared to those at high frequencies. This study is of practical interest for biological applications of electrical pulses, such as electroporation, whose efficacy depends on cell type and its electrical impedance characteristics.

As a sequel to a previous paper on electrostatic potential of point charges inside dielectric prolate spheroids [J. Electrostatics 66 (2008) 549-560], this note further presents the exact solution to the electrostatic problem of finding the electric potential of point charges inside a dielectric oblate spheroid that is embedded in a dissimilar dielectric medium. Numerical experiments have demonstrated the convergence of the proposed series solutions.

The exact solution to an electrostatic problem of finding the electric potential of point charges inside a dielectric prolate spheroid is discussed in this note by using the classical electrostatic theory, where the prolate spheroid is embedded in a dissimilar dielectric medium. Such a problem may find its application in hybrid solvent biomolecular simulations, in which biomolecules and a part of solvent molecules within a dielectric cavity are explicitly modeled while a surrounding dielectric continuum is used to model bulk effects of the solvent beyond the cavity. Numerical experiments have demonstrated the convergence of the proposed series solutions.

ESD protection for RF applications must deal with good ESD performance, minimum capacitance, zero series resistance and good capacitance linearity. In order to fulfil these requirements, different ESD protection strategies for RF applications have been investigated in a 0.18 μm CMOS process. This paper compares different ESD protection devices and shows that a suitable ESD performance target for RF applications (200 fF max, 2 kV HBM) can be reached with a diode network scheme. The optimization of the diodes is then a key point which is detailed. A trade-off must be found between the ESD performance, the voltage drop during ESD and the parasitic capacitance. Poly as well as STI bounded diodes have been studied and it appears clearly that a solution based on poly bounded diodes is the best choice

Very fast transition duration due to small gap discharge as the low voltage ESD was investigated in time and frequency domains. The characteristics of rising time of the transition duration were already cleared in 4.5 GHz bandwidth system. In this paper, the measurement system with a tapered coaxial electrode was improved for more high frequency. The insertion loss of a new coaxial electrode was within -3 dB in frequency range below about 6 GHz. As a consequence of the experiment using the new system, the voltage rise time was shown under 90 ps in discharging voltage of below 600 V. In addition, a relationship between maximum frequency range of the transients and discharging voltage were cleared by experiments in frequency domain using the 4.5 GHz system.

In this paper, the lateral SCR devices used in CMOS on-chip ESD protection circuits are reviewed. Such SCR devices had been found to be accidentally triggered on by noise pulses when the ICs are in the normal operating condition. A cascode design is therefore proposed to safely apply the low voltage triggered SCR (LVTSCR) devices for whole-chip ESD protection in CMOS ICs without causing unexpected operation errors or latch-up danger. Such cascoded LVTSCRs with a holding voltage greater than V_DD of an IC can provide CMOS ICs with effective component-level ESD protection but without being accidentally triggered by system-level overshooting or undershooting noise pulses

This paper discusses the electrostatic discharge (ESD) robustness of silicon-on-insulator (SOI) high-pin-count high-performance semiconductor chips. The ESD results demonstrate that sufficient ESD protection levels are achievable in SOI microprocessors using lateral ESD SOI polysilicon-bound gated diodes without the need for additional masking steps, process implants or ESD design area

A novel snubber-clamped diode-string ESD protection circuit for mixed voltage interface microprocessor applications is described. Analytical models, circuit simulation, electrical characterization, ESD electrothermal simulation, ESD test data, and an ESD analytical failure model are shown for shallow trench isolation (STI) and LOCOS CMOS technologies

Germanium and silicon needles were tested as emitter electrodes for use in low-particle-generating static eliminators. The materials were found to oxidize with minimal incorporation of nitrogen, and the negative polarity emitters oxidized at a greater rate than the positive polarity emitters. The negative polarity silicon emitters generated several orders of magnitude greater particle emissions than any of the other emitters tested. The mean particle size was about 0.015 μm. Although the germanium emitters oxidized, little evidence was found to indicate particles were shed from this material. Preliminary data indicates the emitters perform equally well in Class 100 cleanroom air, and lowest particle generation is achieved when germanium electrodes are purged with dry air.

We found field emission between the shield and the disk in AMR/GMR heads that was induced by a high voltage of the write driver. This paper discusses the mechanism of noise generation obtained using spin-stand, an electron beam probe measurement method and SPICE simulation. The source of noise in field emission is the current passing through the GMR element generated by capacitance coupling between the shield and the electrode. To prevent ESD/EOS damage to AMR/GMR heads, the effect of capacitance coupling between the GMR element and the write coil must be taken into account in the design of the AMR/ GMR head structure for hard disk drives.

This work describes how the very fast transmission line pulsing (VFTLP) technique can be used to characterize the switching behavior of ESD protection elements. In a first application, we investigate the behavior of a protection element consisting of a lateral and vertical transistor part. This element shows good ESD performance under 100 ns-TLP and HBM conditions. Under CDM relevant conditions, however, we could identify by means of VFTLP a delayed triggering of the vertical transistor part, which leads to an increased maximum voltage and thus to a low failure threshold. In the second application, we propose a methodology for extraction of the base transit time parameter which improves the accuracy of a compact transistor model during turn on

It is very difficult to discriminate between interferences caused by ESD (emanated electromagnetic impulse) and others on electronic equipments. In this paper, we show the method to discriminate between them and to observe ESD, with giving details of "ESD Impulse Monitor" and practical use of it. We could find the origin of ESD with the measurement equipment and performed countermeasure to prevent it. As a result, the number of equipment failures was reduced 26% in comparison to before countermeasure.

Electrical ionizers with point-to-point and point-to-plane electrode arrangements were evaluated for use in static elimination systems. Elevated temperature tests to 433 K were done in air, while reduced temperature tests to 213 K were done in liquid nitrogen vapors. Balanced static elimination was obtained throughout the temperature range by controlling the ratio of the potentials on the positive and negative emitters, and allowing large free-electron currents from the negative emitters in the nitrogen environment. The charge-decay times were continuous through the nitrogen-to-air transition and dependent upon temperature as exp(const/kT). Under balanced conditions, the ratio of charge-decay times for negatively-charged and positively-charged targets increased from about 1.1 at 213 K to 1.4 at 323 K, and returned to about 1.0 at 433 K. In air, the charge-decay times at constant negative emitter current decreased and their ratio approached unity with increasing superficial flow in the chamber. Nitrogen injection about the emitters primarily influenced static elimination when gas circulation in the chamber was otherwise small. Separate control of positive and negative carrier generation is essential to achieve balanced static elimination in industrial applications

Lateral bipolar n⁺pn⁺ devices, with thick field oxide (TFO) separating the collector and emitter, are often used in snapback mode as protection devices for MOS ESD circuit protection. ESD testing for Human Body Model (HBM), Machine Model (MM) and Charged Device Model (CDM) waveforms was performed on a family of TFO cells which varied the gate length (bipolar base width) as the experimental parameter. For MM and CDM, the data showed a dependence of withstand voltage on the gate length, indicating that longer gate lengths improve performance; while for HBM, withstand voltage was independent of the gate length. The devices exhibited failure modes that manifested as low level current leakage. Failure analysis identified the current leakage sites as melt filaments primarily localized at the TFO ends. Filament distribution was seen to be a function of gate length for MM. Two possible mechanisms are presented to account for the observed filament distribution and follow up experiments are suggested to test the validity of each

The objective of this work was to analyze the general case of an electrostatic discharge (ESD) event which occurs for the approach of two charged floating conductors. Parameters studied include body sizes, and the magnitude and polarity of the charges on the two bodies. ESD parameters including body potentials and energies before a discharge, and the charge transferred and the energy dissipated in the discharge can be calculated for typical test geometries. The methodology is applied to examine the effect of the speed of approach of the two bodies and the conditions which support multiple discharges. The results of this work provide a better understanding of the fundamental principles involved in the ESD event between two charged bodies in approach and have application in estimating the effect of ESD on electronic devices and systems

In this paper a new ESD failure mechanism for magnetoresistive (MR) recording heads is reported and studied. Experimental results show that an MR head can be severely damaged by electric field alone. SEM photographs show pitting and melting damage between the closely spaced conductors that are exposed on the `air bearing surface' of the recording head. The damage is explained by breakdown of the air gaps due to large induced potential differences when the MR head is in an electric field. Construction of a simple `spark generator' is described and used to study the field-induced breakdown behavior of an air gap.

Different discharge mechanisms are possible for ESD (electrostatic discharge) below 2 kV breakdown voltage as a function of the parameters gap distance, breakdown voltage, electrode material and gas pressure. In this paper, risetime measurement data of electrostatic discharges, measured at about 8 GHz bandwidth, are presented as a function of these parameters. Electrode SEM photographs (scanning electron microscope) helps to understand the influence of electrode surface. This provides information about the development of ESD and helps to increase their reproducibility.

Large electrostatic discharge (ESD) protection devices close to the I/O pins, beneficial for ESD protection, have an adverse effect on the performance of broadband RF circuits for impedance mismatch and bandwidth degradation. A new proposed ESD protection structure, pi-model distributed ESD (pi-DESD) protection circuit, composed of one pair of ESD devices near the I/O pin, the other pair close to the core circuit, and a coplanar waveguide with under-grounded shield (CPWG) connecting these two pairs, can successfully achieve both excellent ESD robustness and good broadband RF performance. Cooperating with the active power-rail ESD clamp circuit, the experimental chip in a 0.25-mum CMOS process can sustain the human-body-model (HBM) ESD stress of 8 kV.

By using a reverse global positioning system concept, we have constructed an automatic system with four receivers to locate ESD events with a spatial resolution of 0.31 cm x 0.14 cm x 0.77 cm. We have deployed the system, in an unattended mode, in a prototype manufacturing facility and recorded ESD event locations with corresponding occurrence date and time. In addition to the capability of visualizing invisible ESD events, the system can determine their are strengths and azimuthal orientations. The accumulation of data in environments such as manufacturing facilities, offices or houses can provide much needed environmental stress information about ESD for use in the prediction of product reliability.

Summary form only given. The authors suggest a model of space-charge dispersive transport in noncrystalline dielectrics under the condition of continuous surface carrier injection (corona charging). They consider a sample under open-circuit conditions with rear electrode grounded. Dispersive transport of injected space charge is described within the framework of the carrier multiple-trapping model with the Poisson equation being taken into consideration. Approximate analytical and numerical solutions of the equation for the dimensionless electric field have been obtained. Using these solutions one may calculate time-dependent spatial distributions of the field and space-charge density, and time dependences of voltage and carrier packet mean position

We have studied electrostatic field and charge threshold limits for damage to MOSFET devices in order to understand the ESD damage risks during handling in electronics production and assembly processes. The study covers both field induced charged device model (CDM) and charged board model (CBM) cases. The charging electrostatic field for failure can be even two orders of magnitude lower for a device on a board than at component level. The charge level for failure remains approximately constant. Our results show that charge threshold for failure would serve as a good guide for ESD risks of voltage susceptible MOSFETs as discrete components and when assembled to PWBs.

There have been many recorded incidents of aircraft fuel tank ignition. While electrostatic discharges have undoubtedly started fires during fuelling on the ground, the cause of in-flight fuel tank explosions is difficult to establish and attributing these events to static electricity is very controversial. This paper describes an experimental investigation into the charging of isolated objects in a fuel spray. The results presented here show that while charging readily occurs, insufficient charge is retained by the target objects under the present conditions even to cause sparking. The influence of fuel conductivity on the balance between the rates of charging and charge leakage from the target is examined. The data shows that while fluids with considerable conductivity may wet the insulating material supporting the target object, the leakage resistance can be high. It is concluded that under certain circumstances, increasing fuel conductivity may, therefore, exacerbate the electrostatic problem

Transmission line pulse (TLP) testing is well known for device characterisation in ESD circumstances. In this paper TLP is applied to full-integrated circuits and is shown to offer valuable data for the analysis of the ESD behaviour of ICs. TLP is the only method to study ESD behaviour during ESD stressing and as such provides essential knowledge about actual ESD current paths. The paper shows that both TLP characteristics and recordings of the actual waveforms should be used for a correct analysis. As illustrated by several examples, from different design groups and from different processes, such analysis gives valuable suggestions for improving circuit designs.

This paper summarizes several basic supply clamping techniques and presents an innovative transient clamp circuit that makes use of some properties of a variable voltage clamp. This circuit varies its RC time constant dependent upon whether or not the integrated circuit (IC) is mounted on a printed circuit (PC) board. If the IC is mounted the time constant of the transient clamp is set very short so it will not interfere in the normal operation of the device. However, if the IC is free standing the RC time constant is set much longer to ensure the clamp will stay on long enough to discharge the entire ESD pulse should the need arise. This clamp circuit was used as a component in the electrostatic discharge (ESD) protection network for an analog intermediate frequency (IF) limiter IC. Human Body Model (HBM) ESD levels increased from less then 300 volts to greater then 2000 volts due to the addition of this protection network.