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(a) The FD 82 MIMO adaptive equalizer block diagram, and (b) a graph showing how much computational power is needed in relation to the total number of taps.

(a) The FD 82 MIMO adaptive equalizer block diagram, and (b) a graph showing how much computational power is needed in relation to the total number of taps.

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The aim of this thesis to demonstrate net signal rates of 1 TB/s and 1.8 TB/s, respectively, for 16-bit and 14-bit (4-D) symbol information at 64 and 128 GBaud by precisely equalizing imperfections on both the transmitter and receiver sides using frequency-domain 8x2 multi-input multiple-output nonlinear pre-distortion and linear equalization. Thes...

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