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Traditional 2T1C digital drive scheme. (a) Pixel circuit and (b) timing chart.

Traditional 2T1C digital drive scheme. (a) Pixel circuit and (b) timing chart.

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Article
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A novel digitally driven pixel circuit for active-matrix organic light-emitting diode (OLED) microdisplays is proposed and evaluated. This circuit supports both pulse width modulation and pulse density modulation digital drive approaches. Only three transistors and one capacitor are required per pixel for the proposed circuit. A current mirror is u...

Contexts in source publication

Context 1
... traditional 2T1C digital drive pixel circuit is shown in Fig. 1(a). T 1 and T 2 both work as switches. When SEL is low, T 1 is open, so T 2 is turned on or off depending on the voltage level of Data_line. When SEL is high, T 2 is switched off, so the voltage level is held in C S . The OLED pixel current I oled has only two states: on and off. The pulsing of I oled can be modulated by controlling SEL ...
Context 2
... Data_line is high, T 2 is turned off, and no current flows through the pixel. The state of Data_line is stored in ca- pacitor C S . When T 1 is off, C S maintains the previous voltage level at the gate of T 2 . The signal timing of the proposed cur- rent mirror pixel circuit is the same as the traditional 2T1C pixel circuit as shown in Fig. 1(b). It is fully compatible with both PWM and PDM digital drive schemes. In the AMOLED microdisplay, each pixel requires its own set of PMOS transistors, T 1 , T 2 , and T 3 . All of the pixel circuits share the same ref- erence current circuit, which is implemented with PMOS transistors T 4 and NMOS transistors T 5 and T 6 . I ref is the ...

Citations

... This assumption is valid for most mobile OLED displays. The current density of pixels required to represent the maximum grayscale is approximately 0.1 nA/um 2 [15], and several hundred microamperes of current may flow through the common electrode in a 6-inch display with FHD resolution (1920 x 1080 pixels). Hence, RC is usually managed as less than 10 Ω to prevent non-uniform display images due to IR (current x resistance) drop in the common electrode. ...
Article
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As today’s smartphone displays become thinner, the coupling capacitance between the display electrodes and touch screen panel (TSP) electrodes is increasing significantly. The increased capacitance easily introduces time-varying display signals into the TSP, deteriorating the touch performance. In this research, we demonstrate that the maximum peak display noise in the time domain is approximately 30% of the maximum voltage difference of the display grayscale through analysis of the structure and operation of displays. Then, to mitigate display noise, we propose a circuit solution that uses a fully differential charge amplifier with an input dynamic range wider than the maximum peak of the display noise. A test chip was fabricated using a 0.35 μm CMOS process and achieved a signal-to-noise ratio of 41 dB for a 6-mm-diameter metal pillar touch when display pulses with 5-V swing were driven at 100 kHz.
... Traditional pixel data transmitting sequence obeys the electron beam scanning strategy: from left to right and from top to bottom [12,13,14]. The obvious advantage of this operation is that this strategy is suitable for current systems. ...
Article
In order to improve the higher rate of OLED-on-Silicon Micro-display, this paper proposes a high-efficient operator strategy, which is based on the cancel of waiting time. The theory structure of high-efficient operator is proposed through the relationship between sub-field sequences and bit sequence for different gray levels. This operator is tested using the IP core and self-built HD OLED micro-display system. The experiment shows that the high-efficient operator can obtain excellent scan utilization under idle condition, compared with the traditional scan methods.
Article
In order to efficiently manage the power consumed by the display, there is a need for a system that can accurately predict the power consumed according to displayed image. Existing AMOLED display power models do not consider the effects of I-R drop, a voltage drop along the VDD line. Therefore, when the existing power model is applied to a recent AMOLED display panel which has a large physical size and uses a large current, power consumption cannot be accurately predicted. In this paper, we propose a new model to compensate for the I-R drop at the software level and present a more accurate method for predicting AMOLED display power consumption by applying it to existing AMOLED display power models. To verify this, we conducted extensive experiments using the proposed method for various image databases on AMOLED display panels of SAMSUNG Galaxy S7 and S9. When comparing the proposed display power model connected with the I-R drop compensation model with conventional power models, it is confirmed that the proposed power model improves the accuracy by up to 70.3% over them.
Article
A new SRAM-based pixel circuit is presented for use in a high-voltage digitally-driven pixel array in a micro-display panel. The pixel circuit is based on the standard 6T SRAM structure, but uses two more transistors of which gate dc-bias is controlled to adjust the pull-up strength of the inverters in the SRAM. This allows the pixel circuit to be operated with low-voltage row- and column-line signals while holding the stored logic in a high-voltage level. As a result, power and area of the pixel driving circuits are greatly reduced. The added two transistors do not necessitate area overhead if the pixels are to be individually separated with rectangular shape, which is true in many cases. To verify proper operation and power reduction efficacy of the proposed SRAM pixel circuit, a simple $100\times 200$ digital pixel array, together with row- and column-line drivers, is implemented using a 0.13-$\mu \text{m}$ CMOS technology and 1.5-V/3.3-V supplies. The measurement results show that, with the optimum bias for the two added transistors, total power dissipation including pixel array and driver power can be reduced by about as much as 78 %, which is very close to the theoretical limit of 79 % (= (1.5/3.3) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ).
Article
The active-matrix organic light-emitting diode (AMOLED) is an energy efficient display technology due to its nonvolatility. However, the complex circuit structure obstructs its performance improvement. Here, ferroelectric field effect transistors (FeFETs) consisting of a BiFeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (BFO) ferroelectric gate layer, a ZnO semiconductor channel layer, and a La <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.6</sub> Sr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.4</sub> MnO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> bottom-gate electrode were fabricated. A large OFF/ON resistance ratio (~ 4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) was obtained, and the carrier accumulation or depletion at the ZnO/BFO interface owing to the ferroelectric field effect was confirmed by Hall measurements. Based on the high performance ZnO-based FeFET, a simplified AMOLED pixel circuit was designed and experimentally verified. The estimated aperture ratio was improved greatly from 28% to 37%. Furthermore, the operation speed of the FeFET could be as fast as 5 ns. These findings are of great significance in developing high performance AMOLED display devices.
Article
A new digital pixel driving scheme is presented for reducing power in the column-line drivers in a single-pulse-PWMbased display. Rather than updating the digital pixel memory value for every access of the memory, the proposed driving scheme utilizes the property that there are only two level transitions in a single-pulse PWM for representing a digital value. With the use of AND-embedded SRAM pixel memory and simple logic controlling the AND gates, this minimizes the number of column-line signal transitions as the row-line scanning progresses. As a result, power dissipation in the column-line drivers is greatly reduced compared to the case when using a conventional digital pixel driving scheme. Quantitative analysis describing the number of column-line signal transitions for both the conventional and proposed schemes agrees well with the simulation results for random digital inputs and real sample images as well, verifying the efficacy on power reduction in the column-line drivers. Including power dissipation by the circuits controlling the AND gates in the pixel memories, power reduction efficiency for many different image samples is at least more than 50 %.
Conference Paper
Full-text available
A novel AMOLED-on-silicon microdisplay driver circuit with the digital-analog-hybrid scan strategy is designed for high resolution and high frame refresh rate display. The strategy of the digital-analog-hybrid scan is analyzed. A particularly designed multiplex column driver circuit is proposed. The column driver circuit is simulated. The experimental results show that the digital-analog-hybrid scan method can effectively reduce data flow.