Fig 7 - Unintentional Islanding Evaluation Utilizing Discrete RLC Circuit Versus Power Hardware-in-the Loop Method

PHIL test result for test 4. Balanced load UI, with PF= 0.9, Pinverter = Pload, VV=off, FW=LA.

Reference

Unintentional Islanding Evaluation Utilizing Discrete RLC Circuit Versus Power Hardware-in-the Loop Method - Scientific Figure on ResearchGate. Available from: https://www.researchgate.net/figure/PHIL-test-result-for-test-4-Balanced-load-UI-with-PF-09-Pinverter-Pload-VVoff_fig3_346408095 [accessed 22 Mar, 2023]

Caption

Fig. 7. PHIL test result for test 4. Balanced load UI, with PF= 0.9, Pinverter = Pload, VV=off, FW=LA.

Embed code

<a href="https://www.researchgate.net/figure/PHIL-test-result-for-test-4-Balanced-load-UI-with-PF-09-Pinverter-Pload-VVoff_fig3_346408095"><img src="https://www.researchgate.net/profile/Edgardo-Desarden/publication/346408095/figure/fig3/AS:962590549217281@1606510879206/PHIL-test-result-for-test-4-Balanced-load-UI-with-PF-09-Pinverter-Pload-VVoff.jpg" alt="PHIL test result for test 4. Balanced load UI, with PF= 0.9, Pinverter = Pload, VV=off, FW=LA."/></a>