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Ladder Logics is a programming language standardized in IEC 61131-3 and widely used for programming industrial Programmable Logic Controllers (PLC). A PLC program consists of inputs (whose values are given at runtime by factory sensors), outputs (whose values are given at runtime to factory actuators), and the logical expressions computing output v...
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Context 1
... 4 shows a screenshot of this graphical interface. This is what our prototype returns when run on example of figure 1. In this case, the interface states the errors occurs at BCD instruction call location (it is colored in red). ...
Context 2
... drawback of our prototype concerns the fact that it may raise false positive alarms, since it only considers one scan of the Ladder program. For example in Figure 1, value of device D0 may be changed after the BCD instruction call, such that value 10, 000 is never reached. Nevertheless, our prototype would still raise an alarm. ...
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... way to improve our prototype could be to provide some quickfix-like mechanisms to programmers. In example of Figure 1, our prototype could propose to the programmer to add automatically, before the BCD instruction call, a line that resets D0 when it does not belong to range [0; 9999]. ...
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Citations
... Our main goal is the verification that a Ladder diagram conforms to such a timing chart specification. A first idea would be to envision the use of deductive verification techniques, in the wake of our previous work on Ladder instruction-level verification [11]. However, not all variables used in the Ladder program of Fig. 2 are addressed by the timing chart. ...
... Indeed, as we have seen in Fig. 15, abstract interpretation takes much more time than translation to WhyML, VC generation and proving by back-end solvers. Moreover, we experimented in previous work [11] that those three phases (translation, VC generation and proving) are efficient (a few seconds) for programs whose sizes are about 50 times bigger than the Carriage line control example. ...
... Contrary to modelchecking, abstract interpretation gives a full guarantee when it detects no error in a program, but it is dedicated to compute the possible values of variables during the execution of a program, and is not suited for verifying temporal properties. Finally, in a previous work [11], some of us used the Why3 deductive verification platform for detecting run-time errors of Ladder programs. This work only considered one single execution of Ladder programs and was therefore also not suited for verifying temporal properties. ...
Programmable Logic Controllers are industrial digital computers used as automation controllers in manufacturing processes. The Ladder language is a programming language used to develop software for such controllers. In this work, we consider the description of the expected behaviour of a Ladder program under the form of a timing chart, describing a scenario of execution. Our aim is to prove that the given Ladder program conforms to the expected temporal behaviour given by such a timing chart. Our approach amounts to translating the Ladder code, together with the timing chart, into a program for the Why3 environment for deductive program verification. The verification proceeds with the generation of verification conditions: mathematical formulas to be checked valid using automated theorem provers. The ultimate goal is twofold. On the one hand, by obtaining a complete proof, one verifies the conformity of the Ladder code with respect to the timing chart with a high degree of confidence. On the other hand, in the case the proof is not fully completed, one obtains a counterexample, illustrating a possible execution scenario of the Ladder code which does not conform to the timing chart.
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Programmable Logic Controllers (PLCs) are industrial digital computers used as automation controllers in manufacturing processes. The Ladder language is a programming language used to develop PLC software. Our aim is to prove that a given Ladder program conforms to an expected temporal behaviour given as a timing chart, describing scenarios of execution. We translate the Ladder code and the timing chart into a program for the Why3 environment, within which the verification proceeds by generating verification conditions, to be checked valid using automated theorem provers. The ultimate goal is two-fold: first, by obtaining a complete proof, we can verify the conformance of the Ladder code with respect to the timing chart with a high degree of confidence. Second, when the proof is not fully completed, we obtain a counterexample, illustrating a possible execution scenario of the Ladder code which does not conform to the timing chart.
