LPC Module lary to be synthesized, The inconvenience of the second approach is that the host CPU must service the speech processor by performing a series of read and store of the LPC coefficients at a rate of approximatly 1200 bits per second, Inversely, in the first approach, the host processor is interrupted only when the speech processor has completed the synthesis of a word or a frame, Finally, the last speech module uses the CMOS SSI 263 phonetic speech synthesizer. circuit manufactured by Silicon Systems, It can be operated in two modes, At low bit rate, the speech quality is comparable to the speech produced by the Vot rex SC-OlA chip, In this operating mode the host processor only transmits the codes for the individual phonemes to be synthesized, This explains a low bit rate of approximatly 70 bits per second, In the second operating mode, it .is possible to dynamically program the content of the registers of the 263,