Fig 6 - uploaded by Thi-Thuy Luu
Content may be subject to copyright.
Formation of intermetallic phases during the Cu/Sn annealing process. Both phases of Cu 3 Sn and Cu 6 Sn 5 can be distinguished from Cu. Formation of Cu 3 Sn dominates at high annealing temper- atures.
Source publication
The objective of this study is to optimize the Cu/Sn solid–liquid interdiffusion process for wafer-level bonding applications. To optimize the temperature profile of the bonding process, the formation of intermetallic compounds (IMCs) which takes place during the bonding process needs to be well understood and characterized. In this study, a simula...
Citations
... In the case of the bonding layer, plating and deposition processes have been applied using various binary materials, such as Au-Sn, Cu-Sn, etc., and low-temperature processes and low-priced bonding materials are needed for mass production [5,6]. Recently, Cu-Sn, which is relatively cheap, has been widely used, and various thermal treatment methods in which microstructures were obtained have been reported, leading to increases in reliability [7][8][9][10][11][12]. Kumar S. et al reports Matano plane-based diffusion model Cu-Sn diffusion couples [7]. ...
... In addition, the interdiffusion coefficients and activation energies for diffusion were also evaluated. Luu T. et al characterized the formation of intermetallic compounds (IMCs) during Cu-Sn wafer-level bonding process by developing thermal kinetics models for the thickness of Cu3Sn and the amount of Sn converted into IMCs [10]. Wu D. et al. presents a high-density, irreversible Cu-Sn bump eutectic bonding technology for wafers in their research. ...
... where y0 is the initial thickness of IMC, yt is the thickness at time t, k0 is the diffusion coefficient, R is the ideal gas constant, T is the temperature, Q is the activation energy, and n is the growth index. Figure 5 shows a comparison between the Arrhenius model and the experimental results of the thickness change (yt) of the Cu3Sn phase over time and with different heat treatment temperatures in the Cu-Sn binary system using the values reported previously [10]. In this experiment, the initial thicknesses of the deposited Cu and Sn were 3um and 2um. ...
Most microsensors are composed of devices and covers. Due to the complicated structure of the cover and various other requirements, it difficult to use wafer-level packaging with such microsensors. In particular, for monolithic microsensors combined with read-out ICs, the available process margins are further reduced due to the thermal and mechanical effects applied to IC wafers during the packaging process. This research proposes a low-temperature, wafer-level vacuum packaging technology based on Cu-Sn bonding and nano-multilayer getter materials for use with microbolometers. In Cu-Sn bonding, the Cu/Cu3Sn/Cu microstructure required to ensure reliability can be obtained by optimizing the bonding temperature, pressure, and time. The Zr-Ti-Ru based nanomultilayer getter coating inside the cap wafer with high step height has been improved by self-aligned shadow masking. The device pad, composed of bonded wafer, was opened by wafer grinding, and the thermoelectrical properties were evaluated at the wafer-level. The bonding strength and vacuum level were characterized by a shear test and thermoelectrical test using microbolometer test pixels. The vacuum level of the packaged samples showed very narrow distribution near 50 mTorr. This wafer-level packaging platform could be very useful for sensor development whereby high reliability and excellent mechanical/optical performance are both required. Due to its reliability and the low material cost and bonding temperature, this wafer-based packaging approach is suitable for commercial applications.
... For full conversion to a Cu/Cu 3 Sn/Cu bond interface, two significant conditions need to be met. The first condition is the minimum thickness ratio of Cu to Sn: h h 1.32 Cu Sn = [18]. This ensures that there is an excess Cu layer to exhaust the Sn layer. ...
In this paper, Cu/Sn/Cu solid-state diffusion (SSD) under low temperature is proposed and investigated for three-dimensional (3-D) integration. Cu and Sn films were deposited by high-efficiency and low-cost physical vapor deposition to fabricate 40-µm-pitch daisy-chain structures. Subsequently, the Cu bump surface was treated with Ar (5% H 2 ) plasma. The Cu/Sn/Cu structure was bonded face to face at 200 ℃ for 15 min. The interfacial composition of the as-bonded dies comprised five layers, Cu/Cu 3 Sn/Cu 6 Sn 5 /Cu 3 Sn/Cu, with no Sn remaining and no overflow. After annealing at 200 ℃ for 15 min under N 2 atmosphere, as the Cu 6 Sn 5 completely transformed into Cu 3 Sn, the microstructure changed to stable three layers: Cu/Cu 3 Sn/Cu. Additionally, the average bonding shear strength reached 27.0 MPa, which is higher than that for conventional Cu/Sn SSD bonding. The measured bonding resistance value was maintained at the theoretical value. Moreover, the parabolic growth constant of Cu3Sn reached 1.86×10 ⁻¹⁵ m ² /s. Our study demonstrates the feasibility of using Cu/Sn/Cu SSD for low-temperature, short-time, wafer-level bonding.
... In 1966, Bernstein presented for the first time the SLID mechanism of the binary systems Ag-In, Au-In, and Cu-In [16]. Today, Au-Sn [14,17,18] and Cu-Sn [14,19,20] are the most studied SLID systems with process temperatures above 278 °C and 232 °C, and IMC melting temperatures at about 500 °C and 700 °C, respectively. Therefore, SLID bonding is one of the most interesting low-temperature packaging technique, especially for wafer-level and 3D integration. ...
... The diffusion process of unalloyed copper and tin will accelerate by exceeding the melting point of Sn (TM_Sn = 232 °C). The temperature range used in the literature is between 250 °C and 300 °C [14,15,19,20,46], resulting in intermetallic bonds of Cu6Sn5 (η-phase) and Cu3Sn (ε-phase) during the bonding process. The η-phase is formed in the early heating stage. ...
... With respect to the Cu-Sn binary system, the target phase Cu3Sn was achieved in a process time of 130 s with a tool pressure of 3 MPa. Compared to conventional Cu-Sn SLID bonding, this means a reduction of the bonding time by approximately 60 to 90% [14,15,19]. ...
Considering the demand for low temperature bonding in 3D integration and packaging of microelectronic or micromechanical components, this paper presents the development and application of an innovative inductive heating system using micro coils for rapid Cu-Sn solid-liquid interdiffusion (SLID) bonding at chip-level. The design and optimization of the micro coil as well as the analysis of the heating process were carried out by means of finite element method (FEM). The micro coil is a composite material of an aluminum nitride (AlN) carrier substrate and embedded metallic coil conductors. The conductive coil geometry is generated by electroplating of 500 µm thick copper into the AlN carrier. By using the aforementioned micro coil for inductive Cu-Sn SLID bonding, a complete transformation into the thermodynamic stable ε-phase Cu3Sn with an average shear strength of 45.1 N/mm 2 could be achieved in 130 s by applying a bond pressure of 3 MPa. In comparison to conventional bonding methods using conduction-based global heating, the presented inductive bonding approach is characterized by combining very high heating rates of about 180 K/s as well as localized heating and efficient cooling of the bond structures. In future, the technology will open new opportunities in the field of wafer-level bonding.
... Moreover, Sn melts and then dissolution of Cu into Sn commences toward the formation of IMCs. However, the thickness fraction of the IMC formed during the ramp up step is rather low [24]. Therefore, the IMC layer is not incorporated at this stage, but the melting of Sn is accounted for in the model. ...
... Therefore, in this step, time constraints are not included and the IMC of interest, i.e., Cu 3 Sn is directly incorporated in the model. Simulating the IMC formation is complicated as it is governed by diffusion kinetics and thermodynamical constraints [24]. Moreover, when Cu 3 Sn is formed, there is also a volume shrinkage. ...
... In literature, there is a large scatter in the data regarding volume shrinkage when IMCs are formed. Different percentage values for volume shrinkage such as 2% [24], 5% [32], 10% [33], and 12.4% [21] are reported when Sn transforms to Cu 6 Sn 5 . Similarly, 2% [24], 7.5% [21], 8.2% [33], and 8.5% [32] are reported for volume shrinkage when Cu 3 Sn is formed. ...
Solid–liquid interdiffusion (SLID) bonding finds a wide variety of potential applications toward die-attach, hermetic encapsulation of microelectromechanical systems (MEMS) devices and 3-D heterogeneous integration. Unlike soft soldering technique, the solidification of intermetallic compound (IMC) formation in SLID bonding occurs during the process isothermally, making it difficult to predict and mitigate the sources of process-dependent thermomechanical stresses. Literature reports two dominant factors for the built-in stress in SLID bonds: volume shrinkage (due to IMC formation) and coefficient of thermal expansion (CTE) mismatch. This work provides a detailed investigation of the Cu–Sn SLID bonding process by finite element (FE) simulations. Specifically, the FE simulation of the SLID bonding process is divided into three steps: ramp-up, hold-time, and ramp-down stages to understand the stresses formed due to each individual step. Plastic material properties for Cu as well as temperature-dependent material parameters for different entities are assigned. Process-dependent thermomechanical stresses formed during the ramp-up and hold-time steps (IMC formation) were found not to be significant. The hold-time step is governed by the reaction and diffusion kinetics, which determines the bond line quality including defects, such as voids. The ramp-down step is the dominant phase influencing the final stress formations in the bonds. The results show an average of >30% decrease in the stress levels in Cu
<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub>
Sn layer (IMC) when the bonding temperature is brought down from 320 °C to 200 °C, thus demonstrating the importance of low-temperature SLID process.
... Thus, the thicknesses of SnAg deposited on chip and/or substrate side are chosen to be 5, 10, and 15 lm in order to cover different total thickness of SnAg alloy varying from 5 to 30 lm. For all samples, copper is deposited with a thickness (e Cu ) of 20 lm in both chip and substrate sides which is sufficiently thick (e Cu-[ 1.31e Sn /2 [25]) in order to have some copper left at the end of the TLPB process even for samples with an initial SnAg thickness equal to 15 lm on both sides. The same method was used for SnAg alloy deposition, the chemical species present at the electrolyte bath is different, but the principle is quite the same. ...
In this work, we study the Transient Liquid Phase Bonding (TLPB) for flip chip interconnexion using copper pillar and SnAg solder alloy technologies. Cu and SnAg bumps with a size of 90 × 90 µm2 were deposited using electroplating process with a thickness of 20 µm and 15–30 µm, respectively. Two types of Cu were deposited: with or without additives. Before the TLPB process, soldering experiments with or without pre-reflow were carried out at 250 °C in order to insure a good filling of the joint. Afterwards, isothermal holdings up to 4 h were performed in the temperature range between 250 and 350 °C under air atmosphere. Two main aspects of Cu/SnAg system are studied and analyzed: (i) the evolution of morphology, microstructure, and growth kinetics of intermetallics (IMCs) during the TLPB and especially (ii) the formation and growth of gas bubbles within the liquid solder during TLPB process. Destructive (scanning electron microscopy) and non-destructive (X-ray) characterizations are performed to analyze and understand the evolution of microstructure as well as the formation and evolution of cavities within the joint during the TLPB process. Non-destructive X-ray radiography with 5 µm resolution and 3D X-ray tomography analysis with 0.7 µm resolution were conducted for the same joint at different steps of its evolution between its initial state (just after the soldering process: about 3 min at 250 °C) and 4 h at 250 °C in order to follow “in situ” the evolution of volume defects inside the joint and especially the evolution of gas bubbles within the joints.
... One is the interfacial reaction growth, and the other is the ripening growth by annexation of neighboring grains. There are chemical reactions for the growth and transformation of interfacial IMCs in Cu/Sn/Cu microbumps [36,37]. ...
The thickness of the solder, for Cu/Sn/Cu microbumps with dimensions of tens of microns or even a few microns (such as 40 µm, 15 µm, 10 µm, and 6 µm), can have a significant effect on the interfacial transfer and the performance. During the reflow stage, it was found that the grains of Cu6Sn5 showed “staggered growth” phenomenon in some areas of the microbumps with the solder thickness of 6 µm and the thickness of intermetallic compounds’ (IMCs) layer grew the fastest; that the second fastest growth of 40 µm; that the third fastest growth of 15 µm, and that the slowest growth of 10 µm. After thermal aging at 160 °C for 80 h, the thickness of the IMC layer in descending order was the microbumps with the solder thickness of 15 µm, 10 µm, 40 µm, and 6 µm. These results were caused by the difference in the element concentration. In addition, there were four main components in the microbumps: Cu, Sn, Cu6Sn5, and Cu3Sn. The hardness of Cu and Sn was about 1.37 ± 0.3 Gpa and 0.13 ± 0.03 Gpa, respectively. And the hardness of Cu6Sn5 and Cu3Sn was about 6.7 ± 0.3 Gpa and 6.2 ± 0.4 Gpa, respectively. The nanoindentation hardness analysis showed a general increase in the hardness of the microbumps after thermal aging for 80 h, compared with that after reflow. And the thinner the solder thickness was, the more obvious the hardness improvement was.
... Successful SLID bonds utilizing the Cu-Sn system have been carried out at temperatures around 300ºC [2,3,[8][9][10][11][12]. Additionally, several other binary material systems like, Ag-In [13][14][15], Au-In [16][17][18], Cu-In [19], Ag-Sn [20,21], Ni-Sn [22,23], and Au-Sn [24][25][26][27][28][29][30][31] have also demonstrated potential for SLID bonding. Most of these systems require bonding temperatures close to 300ºC, which already is clearly lower than the typical temperatures required in the most commonly utilized eutectic (like Al-Ge), anodic and glass-frit bonding processes [1]. ...
The wafer-level Solid Liquid Interdiffusion (SLID) bonds carried out for this work take advantage of the Cu-In-Sn ternary system to achieve low temperature interconnections. The 100mm Si wafers had μ-bumps from 250μm down to 10μm fabricated by consecutive electrochemical deposition of Cu, Sn and In layers. The optimized wafer-level bonding processes were carried out by EV Group and Aalto University across a range of temperatures from 250°C down to 170°C. Even though some process quality related challenges were observed, it could be verified that high strength bonds with low defect content can be achieved even at a low bonding temperature of 170°C with an acceptable 1-hour wafer-level bonding duration. The microstructural analysis revealed that the bonding temperature significantly impacts the obtained phase structure as well as the number of defects. A higher (250°C) bonding temperature led to the formation of Cu3Sn phase in addition to Cu6(Sn,In)5 and resulted in several voids at Cu3Sn|Cu interface. On the other hand, with lower (200°C and 170°C) bonding temperatures the interconnection microstructure was composed purely of void free Cu6(Sn,In)5. The mechanical testing results revealed the clear impact of bonding quality on the interconnection strength.
... Different metal combinations, such as Ag-Sn, Ag-In, Au-Sn [25,26,[28][29][30][31], Au-In [32], Ni-Sn and Cu-Sn [15,27,[33][34][35][36][37][38], are employed in SLID bonding technique and have been continuously explored for semiconductor packaging applications. A comparison between different metal combinations employed in SLID bonding is presented in Table 1 [39]. ...
... For instance, if the sample is stored at a lower temperature for a long duration and then the ramp rate to bond temperature during bonding is very low, then there is a certain possibility that pure tin in the system may get completely transformed into g-phase. Therefore, at the bonding temperature, there will be no pure tin available to liquefy and compensate for the undulation/non-uniformity of and (1-4) refers to the reflow number, i.e. 1st, 9th, 13th, 20th reflow, respectively [76] the g-phase scallops resulting in the void formation at the bond interface [36]. Bader et al. [59] have reported that although the void formations can be reduced by applying a sufficient amount of pressure on the bond pads, the voids will not be completely eliminated. ...
... Chemical reaction occurring in the Cu-Sn interdiffusion process[36] ...
In recent years, Cu–Sn solid–liquid interdiffusion (SLID) bonding has been used in semiconductor packaging, die-attach, fine-pitch interconnection, and through-silicon vias (TSV)-based 3D stacking applications. Due to its specific advantages such as lower cost, less stringent surface uniformity requirements, higher thermal bond stability, and relatively lower processing temperatures, electrodeposited Cu–Sn-based bonding is explored to achieve wafer-level hermetic encapsulation of miniaturized sensors; however, the overall reliability of Cu–Sn bonds remains a challenge. The voids formed in the electrodeposited Cu–Sn layers and the brittle nature of the formed intermetallic compounds (IMC) affects the long term reliability of the Cu–Sn SLID bonds. A significant concern is the sporadic interfacial void formation within the Cu–Sn layers during the bonding process and high-temperature applications. This review article summarizes the different mechanisms of the IMC formation and their growth and explores the reasons behind the interfacial voids formed in the electrodeposited Cu–Sn layers when these are annealed at different temperatures ranging from 150 to 300 °C. A detailed description of the IMC and void formation and their subsequent growth in the thick electrodeposited Cu–Sn layers is presented, along with the various design parameters affecting the IMC growth during the bonding process. Various remedies to minimize these interfacial voids are also suggested. Higher bonding pressure, lower processing temperature, and reduced surface roughness are the key factors affecting the void size and voids density. The chemical impurity in the copper electrolyte and the resultant surface roughness affect the interfacial void formation in the electrodeposited Cu–Sn layers. This review will help minimize the interfacial voids and, thus, obtain higher bond reliability.
... Successful SLID bonds utilizing the Cu-Sn system have been carried out at temperatures close to 300ºC [4][5][6][7][8][9][10]. Additionally, several other binary material systems like, Ag-In [11][12][13], Au-In [14][15][16], Cu-In [17], Ag-Sn [18,19], Ni-Sn [20,21] and Au-Sn [22][23][24][25][26][27][28][29] have also been demonstrated potential for SLID bonding. However, reducing the bonding temperatures to below 250ºC results in reduced residual stresses caused by mismatch in the thermal expansion locally between Cu and Si or globally between other cap materials (such as germanium, glass or sapphire). ...
... When the reaction took place for 25 min, the complete stable product Cu3Sn were formed and at 20 min and 15 min, two compounds will appear at the bonding interface, namely Cu3Sn and Cu6Sn5. The reason was that Cu6Sn5 did not had enough time to continue to react with Cu to form Cu3Sn [21]; (4) Cooling: in order to reduce thermal stress due to the different thermal expansion coefficient between Si wafer and different metals, slowly lowering the temperature to 150 °C at a lower rate, then evacuate and fill N2 to break the vacuum. The entire wafers which bonded with the optimal bonding parameters were diced to five areas according to the marks. ...
In 3D-system packaging technologies, eutectic bonding is the key technology of multilayer chip stacking and vertical interconnection. Optimized from the aspects of the thickness of the electroplated metal layer, the pretreatment of the wafer surface removes the oxide layer, the mutual alignment between the wafers, the temperature of the wafer bonding, the uniformity of pressure and the deviation of the bonding process. Under the pretreatment conditions of plasma treatment and citric acid cleaning, no oxide layer was obtained on the metal surface. Cu/Sn bumps bonded under the condition of 0.135 Mpa, temperature of 280 °C, Sn thickness of 3–4 μm and a Cu-thickness of five micrometers. Bonded push crystal strength ≥18 kg/cm2, the average contact resistance of the bonding interface is about 3.35 mΩ, and the bonding yield is 100%. All performance indicators meet and exceed the industry standards.
