[Show abstract][Hide abstract] ABSTRACT: Conventional oxide reliability studies determine oxide lifetime by measuring the time to breakdown or quasi-breakdown (QB). In ultrathin gate oxides with T<sub>ox</sub><14 Å, however, it is hard to observe breakdown or QB under typical stress conditions. Instead, the gate leakage current shows a continuous increase over the entire time period of electrical stress. As the magnitude of the gate current density increase eventually becomes too high to be acceptable for normal device operation, a lifetime criterion based on the increase in gate leakage current is proposed. Our paper also shows that the area-dependence of the gate leakage current density increase in 13.4 Å oxides is different from that in thicker oxide films, indicating a localized and discrete property of the leakage current. It has also been observed that the oxide lifetime based on the new lifetime criterion is shorter when the gate area is smaller, as opposed to the conventional area dependence of time-to-breakdown test. A simple model consisting of multiple degraded spots is proposed and it has been shown that localized gate leakage current can be described by Weibull's statistics for multiple degraded spots.
IEEE Transactions on Electron Devices 05/2003; 50(4-50):967 - 972. DOI:10.1109/TED.2003.812105 · 2.47 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: We report a new NBTI phenomenon for p-MOSFETs with ultra thin gate oxides. We demonstrate that in a CMOS inverter circuit, the interface traps generated under NBTI stressing in a p-MOSFET (corresponding to the "high" output state of the inverter) are subsequently passivated when the gate to drain voltage switches to positive (corresponding to the "low" output state of the inverter). As a result, it was found that this "Dynamic" NBTI (DNBTI) operating in a CMOS inverter circuit prolongs significantly the device lifetime while the conventional "static" NBTI (SNBTI) underestimates the device lifetime. Furthermore, the DNBTI effect is dependent on temperature and gate oxide thickness, but independent of operation frequency. A physical model is proposed for DNBTI that involves the interaction between hydrogen and silicon dangling bonds. This finding has significant impact on the determination of maximum operation voltage as well as lifetime projection for future scaling of CMOS devices.
[Show abstract][Hide abstract] ABSTRACT: For the first time, a dynamic negative bias temperature instability (DNBTI) effect in p-MOSFETs with ultrathin gate oxide (1.3 nm) has been studied. The interface traps generated under NBTI stressing corresponding to p-MOSFET operating condition of the "high" output state in a CMOS inverter, are subsequently passivated when the gate to drain voltage switches to positive corresponding to the p-MOSFET operating condition of the "low" output state in the CMOS inverter. Consequently, this DNBTI effect significantly prolongs the lifetime of p-MOSFETs operating in a digital circuit, and the conventional static NBTI (SNBTI) measurement underestimates the p-MOSFET lifetime. A physical model is presented to explain the DNBTI. This finding has significant impact on future scaling of CMOS devices.
[Show abstract][Hide abstract] ABSTRACT: In this work, influences of nitridation on barrier height change caused by electrical stress with Fowler-Nordheim (FN) injection have been studied: We have employed a novel approach to analyze the small change in the FN tunneling current through the nitrided oxide after electrical stress to quantitatively examine the changes of both effective gate/oxide barrier height and charge trapping density. For both the pure oxide and the nitrided oxides the FN injection. leads to positive charge trapping in the oxides and an increase in the barrier height, however, the nitridation can reduce the barrier height change and the charge trapping significantly.
Japanese Journal of Applied Physics 12/2002; 41(12B). DOI:10.1143/JJAP.41.L1425 · 1.13 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The influence of nitrogen proximity from the Si/SiO2 interface on negative-bias temperature instability (NBTI) effect has been studied. It is found that NBTI lifetime increases significantly by removing the nitrogen away from the Si/SiO2 interface. Additionally, thermal activation energy (Ea) which dictating the amount of NBTI degradation, is also found to be strongly dependent on the proximity of nitrogen from the Si/SiO2 interface. The experimental observations in this letter lend support to the mechanisms of nitrogen-enhanced NBTI in which lowering of hole trapping reaction energy induced by interfacial nitrogen.
Japanese Journal of Applied Physics 10/2002; 41(10). DOI:10.1143/JJAP.41.L1031 · 1.13 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The gate-controlled-diode (GCD) characteristic of a deep submicron MOSFET is changed dramatically following a Fowler–Nordheim (FN) injection. The changes can be explained by the trap generation on the Si surface close to the channel/drain edge and the interface trap generation in the channel region. By examining the change in the reverse drain current under accumulation and inversion in the GCD measurements, the information of trap generation in the surface region close to the channel/drain edge is obtained (note that the trap generation in this region could be different from that in other interface regions); and by measuring the reverse drain current under depletion, the interface trap generation in the channel region is obtained.
[Show abstract][Hide abstract] ABSTRACT: The effect of high nitrogen concentration incorporation using decoupled plasma nitridation (DPN) of ultra-thin gate oxide (≈15–17 Å) on p-channel MOSFET performance has been investigated and compared with the conventional thermal nitridation process. Boron penetration is successfully suppressed in the ultra-thin gate dielectric prepared by the DPN process. This is confirmed by the measurements of gate leakage current, flat-band voltage shift and interface trap densities. The success in blocking boron penetration by DPN is attributed to its capability in incorporating a high level of nitrogen to near the top interface of the gate oxide. However, as a result of high level nitridation by DPN, a degradation in transconductance (Gm) is observed and interface trap density is also increased, compared to the conventional thermal nitridation process.
[Show abstract][Hide abstract] ABSTRACT: The device performance and reliability of nitride/oxide stack gate dielectrics with different buffer oxide thickness has been studied. The stack dielectrics were fabricated by in situ H (2%)/O2 anneal of chemical vapor deposited Si3N4. Ellipsometry data indicates the formation of SiO2 at the Si3N4/Si interface. With decreasing thickness of the buffer oxide, the gate leakage current reduced while the reliability and metal oxide semiconductor field effect transistor performance were degraded. The degradation in the reliability is attributed to the extension of structural strained layer into the Si3N4 bulk. Our results suggest that a buffer oxide of ∼10 Å is needed for the implementation of Si3N4 gate dielectric for future high performance complementary metal oxide semiconductor devices.
[Show abstract][Hide abstract] ABSTRACT: The impact of nitrogen plasma nitridation on the interfacial quality of ultrathin oxides (1.8 and 2.6 nm) have been investigated and compared with NO nitridation. It is found that plasma-nitrided oxides are more immune to nitridation-induced degradation of channel hole mobility, and have lower intrinsic interface-trap density as compared to NO-nitrided oxides. In addition, plasma-nitrided oxides can further suppress hole mobility degradation induced by boron penetration. The superior performance of nitrogen plasma nitridation is attributed to its capability of incorporating a high level of nitrogen at the top oxide surface, while keeping the Si-SiO2 interface intact.
[Show abstract][Hide abstract] ABSTRACT: The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si/sub 3/N/sub 4/ films were in situ annealed in either H/sub 2/(2%)/O/sub 2/ at 950/spl deg/C or N/sub 2/O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si/sub 3/N/sub 4//Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H/sub 2/(2%)/O/sub 2/ anneal exhibit a lower gate leakage current and improved reliability compared to that of N/sub 2/O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si/sub 3/N/sub 4/ film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 /spl mu/m n-MOSFET device.
[Show abstract][Hide abstract] ABSTRACT: The impact of nitrogen plasma nitridation on the interfacial quality of ultrathin oxide (1.8 nm and 2.6 nm) and negative bias temperature instability (NBTI) have been investigated. It is found that the plasma-nitridation can more effectively suppress nitrogen-induced and boron-induced hole mobility degradation than that of thermal nitridation. Therefore, a higher amount of nitrogen can be incorporated into the plasma-nitrided oxide to suppress boron penetration without compromising the oxide interfacial quality. Furthermore, plasma-nitrided oxides have higher resistance to NBTI and longer NBTI-lifetime than that of thermal-nitrided oxides.
Physical and Failure Analysis of Integrated Circuits, 2002. IPFA 2002. Proceedings of the 9th International Symposium on the; 02/2002
[Show abstract][Hide abstract] ABSTRACT: The degradation of 0.13μm NMOS and PMOS transistors caused by microtrenching (μT) under hot-carrier and edge FN stress is studied. DAHC stress was found to be a sensitive technique for characterizing the NMOS transistors while edge FN stress was more suitable for the PMOS transistors. Interface state generation was also identified as the dominant degradation mechanism.
Plasma- and Process-Induced Damage, 2002 7th International Symposium on; 02/2002
[Show abstract][Hide abstract] ABSTRACT: The effect of X-ray lithography (XRL) process on the reliability of thin gate oxide has been investigated. A large increase in the low-field excess leakage current was observed on irradiated oxides, which was very similar to the electrical stress-induced leakage currents. However, it has been found that the long-term reliability of ultra-thin gate oxide is not affected by XRL process. The excess leakage current could be eliminated by thermal annealing at 400°C and above and no residual damages in the oxide were observed after the annealing.
Japanese Journal of Applied Physics 04/2001; 40(4). DOI:10.1143/JJAP.40.2819 · 1.13 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The mechanism and characteristics of bias annealing of Fowler-Nordheim stress-induced leakage currents [SILC) in thin silicon dioxide films (4.5 nm) at room temperature have been investigated. It is shown that the degree of SILC reduction increases with the anneal gate bias, irrespective of the polarity of the anneal bias. Furthermore, the bias annealing of SILC is found to be greatly enhanced in a hydrogen ambient, thus providing a strong physical evidence that trapped holes are contributing significantly to SILC. The result also suggests that the mechanism uf bias annealing is: like ly related to the annealing of trapped holes. In addition, unbiased thermal annealing of SILC has been studied and compared to the bias annealing. A portion of the SILC apparently annealed out by bias annealing can be reactivated, while thermal annealing causes a permanent annihilation of SILC.
Journal of The Electrochemical Society 12/2000; 147(12). DOI:10.1149/1.1394122 · 3.27 Impact Factor