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ABSTRACT: A quadrature bandpass DeltaSigma ADC for a multistandard TV tuner achieves a total dynamic range of 90 dB over an 8.5-MHz passband centered on 44 MHz while consuming 375 mW. The fourth-order continuous-time ADC uses active-RC resonators configured in a modified feedforward architecture
IEEE Journal of Solid-State Circuits 01/2007; · 3.23 Impact Factor
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ABSTRACT: A CT quadrature bandpass ADC is designed for a multi-standard television receiver. When clocked at 264MHz, the ADC achieves 90dB of total DR over an 8.5MHz BW centered at 44MHz. The 4th-order 4b ADC uses a modified feedforward topology and includes 12dB of AGC. The 2.5mm<sup>2</sup> chip consumes 375mW in a 0.18mum CMOS process
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International; 03/2006
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ABSTRACT: An integrated mixed-signal transceiver for broadband communications is presented. The transceiver includes a configurable dual/single receive data path, a configurable dual/single transmit data path, and auxiliary functions including low-speed ADCs, low-speed DACs, serial port interface, clock and reference generation blocks. The receive data path provides constant input impedance and contains dual input buffers, dual programmable gain stages (PGAs), dual 12-bit ADC blocks, and a digital processing block, all sampling at up to 64 MHz. The transmit data path contains a digital processing block as well, and dual 14-bit DAC blocks with programmable gain, sampling at up to 128 MHz. The chip was implemented in double-poly triple-metal 0.35 μm CMOS technology.
VLSI Circuits Digest of Technical Papers, 2002. Symposium on; 02/2002
