T.K.K. Tsang

McGill University, Montréal, Quebec, Canada

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Publications (15)3.92 Total impact

  • T.K.K. Tsang, Kuan-Yu Lin, M.N. El-Gamal
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    ABSTRACT: This paper presents design techniques of CMOS ultra-wide-band (UWB) amplifiers for multistandard communications. The goal of this paper is to propose a compact, simple, and robust topology for UWB low-noise amplifiers, which yet consumes a relatively low power. To achieve this goal, a common-gate amplifier topology with a local feedback is employed. The first amplifier uses a simple inductive peaking technique for bandwidth extension, while the second design utilizes a two-stage approach with an added gain control feature. Both amplifiers achieve a flat bandwidth of more than 6 GHz and a gain of higher than 10 dB with supply voltages of 1.8-2.5 V. Designs with different metal thicknesses are compared. The advantage of using thick-metal inductors in UWB applications depends on the chosen topology.
    Circuits and Systems II: Express Briefs, IEEE Transactions on 04/2008; · 1.33 Impact Factor
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    ABSTRACT: The design of a dual-source power scavenging and management system for ultra low power wireless medical applications is presented. Power scavenging is achieved by harvesting energy both from solar (primary) and RF power (secondary) sources. Depending on the available energy, the system can supply 1-2mW of power to a wireless device, with up to a 50% duty cycle. A radio-triggering based technique is used to control the activation and shutting down of the complete wireless system, and thus eliminates energy wasting wake-up periods. The system provides a regulated output voltage of 1.5V, with a total power consumption of less than 8.0muW in the sleep mode, and 48muW in the operating mode
    Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on; 06/2006
  • T.K.K. Tsang, M.L. El-Cramal
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    ABSTRACT: This paper presents the design of a fully integrated sub-microWatt CMOS ultra-wideband (UWB) pulse-based transmitter, aimed for low data rate wireless sensors networks. The transmitter consists of a current starving clock, an all-digital pulse generator, and a 2nd derivative Gaussian pulse shaping network with 50 Omega driving capability. The design is implemented in a standard CMOS 0.18 mum process. A typical pulse width of 170 ps is achieved. Two commonly used modulation schemes are investigated. Namely, on-off keying (OOK) and pulse-position modulation (PPM). The complete design occupies an area of 0.14 mm<sup>2 </sup> and consumes an average power of 326.3 nW at 200 Kpps (pulse-per-second) with a 1.5 V supply. At a maximum pulse repetition rate of 100 MHz, the transmitter consumes no more than 82 muW in power, which is among the lowest in transmitter designs reported to date
    Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on; 06/2006
  • R.A. Baki, T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: An approach to estimate the distortion in CMOS short-channel (e.g. 0.18-μm gate length) RF low-noise amplifiers (LNAs), based on Volterra's series, is presented. Compact and accurate frequency-dependent closed-form expressions describing the effects of the different transistor parameters on harmonic distortion are derived. For the first time, the second-order distortion (HD2), in CMOS short-channel based LNAs, is studied. This is crucial for systems such as homodyne receivers. Equations describing third-order intermodulation distortion in RF LNAs are reported. The analytical analysis is verified through simulations and measured results of an 0.18-μm CMOS 5.8-GHz folded-cascode LNA prototype chip geared toward sub-1-V operation. It is shown that the distortion is independent of the gate-source capacitance C<sub>gs</sub> of the MOS transistors, allowing an extra degree of freedom in the design of LNA circuits. Distortion-aware design guidelines for RF CMOS LNAs are provided throughout the paper.
    IEEE Transactions on Microwave Theory and Techniques 02/2006; · 2.23 Impact Factor
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    ABSTRACT: This paper describes current state-of-the-art research on low power wireless systems for medical applications. Distinct design criteria and challenges in this area are addressed. A study of existing wireless technologies and their key applications are presented. A brief assessment of future trends for wireless medicine with a focus on emerging technologies is provided. Finally, a number of different energy-scavenging techniques for the future development of autonomous wireless nodes are reviewed.
    System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on; 08/2005
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    ABSTRACT: This paper surveys recent research on IC designs for wireless applications. Recent advances in device technologies and system architectures are presented. Recent low power wireless systems, both from academia and from industry, are summarized. Circuit design techniques and challenges for low voltage and low power applications are discussed. RF performance and power trade-offs are addressed. Examples of common RF building blocks, e.g. LNA's and VCO's, designed for sub-1 V power supplies are presented.
    IEEE-NEWCAS Conference, 2005. The 3rd International; 07/2005
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents an overview of the ultra-wideband (UWB) technology for wireless communications systems. Following a brief review of the UWB basic principles, the characteristics of application specific UWB wireless systems are described. Design principles and challenges of UWB wireless systems, with an emphasis on monolithic implementations are discussed. Trade-offs between performance, power consumption, and technology choices are addressed. Examples of state-of-the-art UWB circuits and systems are presented.
    IEEE-NEWCAS Conference, 2005. The 3rd International; 07/2005
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: A structure that extends the tuning range of MEMS capacitors by at least a factor of eight, compared to recently reported devices fabricated in the same polysilicon surface micromachining MUMPs process, is proposed. A 0.2 pF capacitor has a 325% tuning range, and a Q-factor of 90 at 2.4 GHz. A variation of the same structure has a 0.6 pF capacitance and a 433% tuning range, compared to 238% and 253% for state-of-the-art MEMS and CMOS devices, respectively. The self-resonance frequencies of both devices are beyond 4 GHz.
    VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on; 07/2003
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents the design and experimental results of an area-efficient LC-based voltage controlled oscillator (VCO) which can operate from a supply voltage as low as 0.7 V (2 mW in power), while being suitable for RF applications. A transformer coupling technique is used to reduce the required silicon area by more than a factor of two, compared to earlier designs, while reducing the phase noise. A VCO occupying a 0.24 mm<sup>2</sup> of area was fabricated in a standard 0.18 μm CMOS process. With a 1 V supply, the 12 GHz VCO consumes 7.7 mW with a measured phase noise of -102.2 dBc/Hz at a 600 kHz offset. A tuning range of 400 MHz is achieved without using varactors. The VCO has an excellent figure of merit (FOM) of -183.4 dBc/Hz, compared to recent designs.
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE; 07/2003
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents the design and experimental results of a dual-band CMOS low noise amplifier (LNA), which can operate from a supply voltage as low as 0.7 V. A switched inductor technique is used. The LNA was fabricated in a standard 0.18 μm CMOS process, and is designed to be used in a dual-band 2.4- and 5-GHz WLAN receiver. With a 1 V supply, the LNA exhibits a measured power gain and noise figure of S<sub>21</sub>=11.6 dB and NF=2.3 dB for the 2.4 GHz band, and S<sub>21</sub>=10.8 dB and NF=2.9 dB for the 5 GHz band.
    Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on; 06/2003
  • M.N. El-Gamal, K.H. Lee, T.K. Tsang
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    ABSTRACT: A fully integrated low-voltage RF receiver front end for 5 GHz radio applications, implemented in a standard 0.18 μm CMOS technology, is presented. The receiver consists of a differential low noise amplifier, an active mixer, and a quadrature voltage-controlled oscillator. The complete receiver is packaged in a standard 24-pin ceramic flat pack and consumes 56 mW from a 0.8 V supply. Measurement results show that the receiver has an overall noise figure of 7 dB, a -1 dBm input-referred IIP3, and 22 dB of image rejection. A stand-alone single-ended version of the LNA is also presented. Simple mechanisms for tuning the gain and the centre frequency of the LNA are proposed. With a supply voltage of 1 V, the LNA provides a power gain of 13.2 dB, has a noise figure of 2.5 dB, and over 10 dB of gain control and 360 MHz of frequency tuning. The LNA still operates well from a supply voltage as low as 0.7 V, providing a power gain of 7 dB.
    IEE Proceedings - Circuits Devices and Systems 11/2002; · 0.36 Impact Factor
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents the principle of operation and design equations of MEMS-based variable capacitors designed using the MUMPs technology. Two prototypes with different tuning characteristics are examined. Measurements have shown that a tuning range of more than 35% is achievable at 2.4 GHz, with a self-resonant frequency of 4 GHz, and a maximum quality factor of 15. An analysis of the performance obtained is discussed, in the context of the characteristics of the fabrication process used.
    Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on; 09/2002
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents the design and experimental results of two CMOS low-voltage low noise amplifiers intended for future wireless applications, and featuring a new and very simple gain control mechanism. Implemented In a standard 0.18 μm CMOS process, and operating from a supply voltage of 1 V, the 8 GHz LNA exhibits a power gain of 13.7 dB and a noise figure of 3.2 dB, while the 9 GHz LNA achieves a forward transmission S<sub>21</sub> of 12.2 dB and a noise figure of 3.7 dB. Both circuits have a gain tuning range of over 10 dB, and can operate from a supply voltage as low as 0.7 V
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE; 02/2002
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper presents the design and experimental results of a low-voltage low noise amplifier (LNA) with gain and frequency control in a standard 0.18 μm CMOS process. Targeting at a center frequency of 5.8 GHz with a supply voltage of 1 V, the LNA exhibits a power gain of 13.2 dB with a noise figure of 2.5 dB. The circuit has over 10 dB of gain tuning, and 360 MHz of frequency tuning, and can operate at a supply voltage as low as 0.7 V.
    Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on; 02/2002
  • T.K.K. Tsang, M.N. El-Gamal
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    ABSTRACT: This paper describes a low voltage low noise amplifier design in a 0.5 μm bipolar process, targeting a center frequency of 5.8 GHz with a voltage supply of 1 V. The forward transmission S<sub>21</sub> is 11.5 dB at a low power consumption of 6.6 mW, including all biasing circuitry. The overall noise figure of the LNA is 4 dB with both input and output impedances matched to 50 ohm. The circuit uses no off-chip components, such as bonding wires and biasing-tees, which makes it suitable for robust integration
    Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on; 06/2001