M. Koch

Fraunhofer Institute for Reliability and Microintegration IZM, Berlín, Berlin, Germany

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Publications (33)4.34 Total impact

  • [Show abstract] [Hide abstract]
    ABSTRACT: During the last years, jetting processes for higher viscosity materials have gained widespread interest in microelectronics manufacturing. Main reasons for this interest are high throughput/productivity of jetting, contactless material deposition, high volume precision and freely designable deposition patterns. In previous studies [ , ] we have demonstrated the jetability of different resin-based materials, being exemplary for unfilled adhesive, for low viscous Underfill resin and for higher viscosity Glob Top materials. The focus of our previous work was on the dosing of various encapsulants - Underfill material with low viscosity and near Newtonian behaviour and Glob Top resins, being non-Newtonian fluids due to higher matrix viscosity and higher filler content (up to 70 wt %) with resulting increased filer/filler and filler/matrix interaction. During the last years jetting has become widely used and has been applied to the dosing of much more complex materials, combining high viscosity matrix materials with odd shaped and compressive particles. Examples for these materials are conductive adhesives and also solder pastes, where the jetting system developed by Swedish company Mydata set’s the current standard for solder paste jetting. In a technological study solder paste jetting using different jetting systems has been investigated in comparison to solder paste dispensing and solder paste printing, especially material rheological behaviour and the correspondence to processability have been evaluated in detail. To illustrate the potential of solder paste jetting as a flexible and powerful tool for electronic system prototyping, a test vehicle has been designed, containing areas for SMD soldering and for process reproducibility. To determine process quality not only basic process data on droplet diameter, resulting material depot size and positioning accuracy have been evaluated, but also statistical means have been employed to determine process homogeneity and stability depending on the respective parameter set. Summarized this paper gives an insight into solder jet process development and describes material rheology demands and limitations and thus allows the optimized use of advanced solder jetting technology for electronics assemblies.
    IMAPS 47th International Symposium on Microelectronics, San Diego, CA, USA; 10/2014
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    ABSTRACT: Medical devices with embedded highly miniaturized microsystems are used as implants in the human body or as non-invasive devices for sensor applications outside the body. Those devices bear quite a lot of economic opportunities but they also do offer unique challenges compared to consumer or automotive applications. Medical applications need to provide biocompatibility, highest miniaturization, rough treatment, autoclave sterilization and harsh environment e.g. humidity, wax, dust, blood or urine to be applicable. And microelectronics packaging needs to protect the functional elements of the microsystem against these rigid conditions. And, with a different set of media, packaging needs to fulfill the same task for automotive applications, where a growing number of control units and sensor systems under the hood in the transmission oil or petrol can be found. For both markets low cost packaging concepts with high media resistivity is needed. Polymer materials - mainly epoxy resins - are widely used in microelectronics packaging. They are established in microsystem manufacturing, for adhesives as die attach glues or for encapsulants as molding compounds, glob tops or underfill materials. Low cost and mass production capabilities are the main advantages of these materials. But like all polymers they cannot provide a hermetical sealing due to their permeability properties. The susceptibility to diffusion of liquids and gases through the polymer and along the interfaces is a drawback for polymer materials in general, as water or other media inside a microelectronic package might lead to softening of the material and to a decreasing adhesive strength and resulting delaminations close to solder bumps or wire bonds reducing package reliability by decreasing the package structural integrity. Therefore, plastic packaging materials with enhanced humidity resistance allowing the manufacturing of miniaturized microsystems for demanding applications as e.g. medical devices would- increase package reliability during assembly and lifetime ideally without cost increase and with no changes in processing. As filler particles have an important influence on the final material properties of microelectronic encapsulants, they are well suited for material modifications. Typically micro-sized silica particles are incorporated into the polymer matrix as the thermo-mechanical properties could be well adapted to reliable packaging demands. However, there are a lot of nano-and micro-sized filler particles with potential to enhance the humidity barrier properties of encapsulants. Working principles of these particles may range from large surface impact of nano-particles, barrier functionality due to stacked layer formation (nano-clays), highly hydrophobic particle surface and molecular water catcher function. Micro- and nano-sized SiO2, bentonite, zeolites, Al2O3, carbon black and carbon nano tubes have been selected for a systematic study. To evaluate the potential of such additives concerning moisture resistance particles are mixed with a microelectronic grade epoxy resin. Neat particles as well as formulations are characterized regarding their water absorption, diffusion and barrier properties. Additionally multi-layer encapsulants with highest humidity barrier properties are introduced. Here, the mechanical or thermo-mechanical functionality is separated from humidity barrier characteristic. Polymer layers are processed wet in wet resulting in a homogeneous encapsulation with gradient material properties. Different methods for characterization of the diffusion properties close to microelectronics application have been developed and applied for material analysis. The pros and cons of simple weight measuring for absorption testing, sorption analysis, TGA desorption measuring, dielectric spectroscopy and encapsulated humidity sensors are presented and discussed along testing results with formulations with the different fil
    Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd; 01/2012
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    ABSTRACT: The constant drive to further miniaturization and heterogeneous system integration leads to a need for new packaging technologies which also allow large area processing with potential for low cost applications. Wafer level embedding technologies and embedding of active components into printed circuit boards (Chip-in-Polymer) are two major packaging trends in this area. This paper describes the use of compression and transfer molding techniques for multi chip embedding in combination with large area and low cost redistribution technology from printed circuit board manufacturing as adapted for Chip-inPolymer applications. The work presented is part of the German governmental funded project SmartSense. Embedding by transfer molding is a well known process for component embedding that is widely used for high reliable microelectronics encapsulation. However, due to material flow restrictions transfer molding does not allow large area encapsulation, but offers a cost effective technology for embedding on a medium size scale as known e.g. from MAP (molded array packaging) molding (typically with sizes up to 60×60 mm²). In contrast, compression molding is a relatively new technology that has been especially developed for large area embedding of single chips but also of multiple chips or heterogeneous systems on wafer scale, typically up to 8” or even up to 12”. Wiring of these embedded components is done using PCB manufacturing technologies, i.e. a resin coated copper (RCC) film is laminated over the embedded components — no matter which shape the embedded components areas are: a compression molded wafer, larger rectangular areas or smaller transfer molded systems (MAP). Typical process flow for RCC redistribution is lamination of RCC, via drilling to die pads by laser, galvanic Cu via filling, conductor line and pad formation by Cu etching, soldermask and solderable surface finish application — all of them standard PCB proces- - ses. The feasibility of the technology is demonstrated by the fabrication of a Land Grid Array (LGA) type package with two embedded dies. First step is a high precision die placement on an intermediate carrier. For embedding, both compression molding and transfer molding are used and directly compared with regards to material properties, processing, resulting die shift and warpage after molding. Reliability testing including MSL testing, temperature cycling, and humidity storage has been performed with LGA packages manufactured using the different technologies. The reliability potential and failure modes are intensively discussed and backed by destructive and non destructive failure analysis. Finally, an outlook for the integration of through mold vias into RCC redistribution process flow is given showing also the potential for package stacking.
    Electronic Components and Technology Conference (ECTC), 2010 Proceedings 60th; 07/2010
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    ABSTRACT: This paper describes the potential of different nano- and micro-sized particles as additives for plastic packaging materials for enhanced humidity resistance/barrier enhancement within microelectronic packages as well testing methods for material characterization concerning their humidity diffusion and absorption properties. This topic is gaining increased importance when considering the trend towards System in Package, where a multitude of components is encapsulated to form one miniaturized SiP that incorporates a large number of different material interfaces and interconnects. These SiPs need to be protected from the environment by encapsulants layers with ever decreasing thickness and thus increased moisture barrier properties.
    Advanced Packaging Materials: Microtech, 2010. APM '10. International Symposium on; 04/2010
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    ABSTRACT: During the last years, jetting processes for higher viscosity materials have gained widespread interest in microelectronics manufacturing. Main reasons for this interest are high throughput/productivity of jetting, contactless material deposition, high volume precision and freely designable deposition patterns. Especially the higher viscosity materials are of interest for the integration of a variety of heterogeneous components as needed for the assembly of System in Package. As knowledge on jetting behavior of these materials is not generally available, a study combining material analysis and process development has been conducted with the aim to demonstrate the limits of jet dispensing for higher viscosity materials. Summarized this paper gives a detailed insight into jet process develop for higher viscosity materials necessary for SiP assembly and describes process design rules and limitations and thus allows the optimized use of advanced jetting technology for microelectronics assembly.
    Proceedings - Electronic Components and Technology Conference 01/2010; DOI:10.1109/ECTC.2010.5490667
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    ABSTRACT: During the last years, jetting processes for higher viscosity materials have gained widespread interest in microelectronics manufacturing. Main reasons for this interest are high throughput/productivity of jetting, contactless material deposition, high volume precision and freely designable deposition patterns. Especially the higher viscosity materials are of interest for the integration of a variety of heterogeneous components as needed for the assembly of System in Package. As knowledge on jetting behavior of these materials is not generally available, a study combining material analysis and process development has been conducted with the aim to demonstrate the limits of jet dispensing for higher viscosity materials.
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    ABSTRACT: Polymer materials mainly epoxy resins are widely used in microelectronics packaging. They are established in printed circuit board manufacturing, for adhesives as die attach glues or for encapsulants as molding compounds, glob tops or underfill materials. Low cost and mass production capabilities are the main advantages of these materials. But like all polymers they cannot provide a hermetical sealing due to their permeability properties. The susceptibility to water diffusion through the polymer and along the interfaces is a drawback for polymer materials in general, as water inside a microelectronic package might lead to softening of the material and to a decreasing adhesive strength and resulting delaminations close to solder bumps or wire bonds reducing package reliability by decreasing the package structural integrity. During package reflow, the incorporated humidity might lead to popcorning, i.e. abrupt evaporation of humidity during reflow soldering. This effect is one major problem during plastic package assembly. The introduction of high temperature lead-free soldering processes has even increased this issue. Therefore, plastic packaging materials with enhanced humidity resistance would increase package reliability during assembly and lifetime ideally without cost increase and with no changes in processing. As filler particles have an important influence on the final material properties of microelectronic encapsulants, they are well suited for material modifications. Typically micro-sized silica particles are incorporated into the polymer matrix as the thermo-mechanical properties could be well adapted to reliable packaging demands. However, there are a lot of nano- and micro-sized filler particles with potential to enhance the humidity barrier properties of encapsulants. Working principles of these particles may range from large surface impact of nano-particles, barrier functionality due to stacked layer formation (nano-clays), highly hydrophobic particle s- - urface and molecular water catcher function. Micro- and nano-sized SiO2, bentonite, zeolites, AI2O3, carbon black and carbon nano tubes have been selected for a systematic study. To evaluate the potential of such additives concerning moisture resistance particles are mixed with a microelectronic grade epoxy resin. Formulations are characterized regarding their influence on humidity diffusion, absorption and desorption behavior as well as their influence on other material properties as reaction kinetics and viscosity. Different methods for characterization of the diffusion properties have been developed and applied for material analysis. The pros and cons of simple weight measuring for absorption testing, sorption analysis and encapsulated humidity sensors are presented and discussed along testing results with formulations with the different filler particles. In summary this paper describes the potential of different nano- and micro-sized particles as additives for plastic packaging materials for enhanced humidity barrier enhancement within microelectronic packages as well testing methods for material characterization concerning their humidity diffusion and absorption properties. This topic is gaining increased importance when considering the trend towards System in Package, where a multitude of components is encapsulated to form one miniaturized SiP that incorporates a large number of different material interfaces and interconnects. These SiPs need to be protected from the environment by encapsulants layers with ever decreasing thickness and thus increased moisture barrier properties.
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    ABSTRACT: Radar sensors are already employed in production model vehicles e.g. for adaptive cruise control (ACC) systems. Further development of driver assistance systems has also led to the use of radar sensors in active safety systems (active brake assistance, collision warning, emergency braking, etc). However, the costs of manufacturing such radar-based systems, capable of gathering reliable information from surroundings, for vehicles across the market spectrum or for compact executive cars are still too high. Thus, despite the improved reliability characteristics, detection properties and safety required for these sensors, the aim is to manufacture such systems more cost-effectively. The German national ldquoKRAFAS (Cost-optimized Radar Sensor for Active Driver Assistance Systems)rdquo project is aiming at integrating 77 GHz components (esp. SiGe MMICs) into a printed circuit board, combining driver and 77 GHz RF circuitry and integrating antenna elements. This will significantly reduce current costs of the 77 GHz RF module by 20-30%. A sketch of such a module with an adapted cylindrical radar lens is depicted in Figure 1. In this paper, design, simulation, technological development, demonstrator realization and subsequent measurement of interconnects of embedded active 77 GHz chips to a high frequency substrate using microvia technology is described. The used molded embedding technology offers great opportunities for a very broad range of frequencies and applications as well as large potential for cost reduction.
    Electronic Components and Technology Conference, 2009. ECTC 2009. 59th; 06/2009
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    ABSTRACT: Multiwell plates in combination with optical inspection equipment are standard tools for biological and biomedical applications e.g. cell-to-cell interaction studies for cancer treatment. Microtechnology based multiwell plates have the potential to monitor physiological cellular interactions at single cell level with a high throughput e.g. for immunotherapy of cancer or targeted drug delivery, where each patient would receive drugs that are known to be useful for his/her specific situation. A Lab-On-Substrate technology platform based on standard PCB technology has been developed for cost- effective fabrication of biological and medical test devices. And as typical PCB laminates, mainly with copper as conductive material, are not biocompatible, a new material base has been identified and evaluated. The long and short time biocompatibility of promising materials including surface treatments have been studied in-vitro. Aluminum, polyimide and Pyralux have been selected as materials with focus on their bio- and process compatibility. A process flow consisting of lamination, Al structuring by wet etching, microwell and via formation by laser drilling and via metallization was developed based on standard PCB processes. These technologies allow a combination of large area and fine structuring for electrode and microwell realization. Furthermore, surface modifications of different materials by both chemicals such as thiols and fluorinated acrylates and plasma treatment were inspected by surface tension and wetting analysis to allow designing the hydrophilicity / hydrophobicity microfluidics networks required for the microwell device. A long-term stability at standard atmosphere conditions of at least one year of these coatings was also found. The technology was demonstrated with a dielectrophoresis enhanced microwell device for single cell handling and detection of cell-to-cell interaction as needed for the improvement of tumor therapy. In summary this paper describes the - proof of concept using PCB manufacturing processes with biocompatible materials for the realization of an electrically enhanced microwell plate. Outcome of the technology developments is a Lab-On-Substrate technology platform for a variety of biomedical applications.
    Electronic Components and Technology Conference, 2009. ECTC 2009. 59th; 06/2009
  • Source
    E. Jung · M. Minkus · K.-F. Becker · M. Koch
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    ABSTRACT: Recent years have shown the tremendous growth of electronic use in medical devices. Especially active implants and hearing aids have driven that trend to today's ultra-small devices embedded into the body. While the integrated circuits' features a ever-decreasing critical geometries and surging performance numbers, the delivery format of such advanced chips is seldom providing the engineering teams with a fully tested, bare die. Miniature implanted devices are hindered in their proliferation by the use of COTS devices, which fail to meet the miniaturization requirements, while on the other hand a dedicated chip run or the procurement of a KGD tested bare die is often cost prohibitive for single and multi chip devices. This paper describes a miniaturization approach using advanced packaging techniques for the electronic system using the example of a miniature camera system (bare die assembly in stack-wirebond and flip chip) suitable for medical imaging. For prototypes, some electronic bare dice are mimicked by de-capsulating the IC from the plastic housing and re-bumping it for use as flip chip. This prototype platform allows to create form factor equivalent circuits with known good chips enabling the demonstration and qualification of miniature devices. In addition, the approach can be used to create 3D stacked systems - this approach is depicted as well.
    Design, Test, Integration & Packaging of MEMS/MOEMS, 2009. MEMS/MOEMS '09. Symposium on; 05/2009
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    ABSTRACT: As the development of microelectronics is still driving towards further miniaturization, new materials, processes and technologies are crucial for the realization of future cost effective microsystems and components. Futures ICs and passives will also decrease in size, e.g. for RF-ID applications forecast die sizes are smaller than 250 ?m, thicknesses less than 50 ?m and pitches way below 100 ?m. Passives, if not directly integrated into the system carrier, will be even smaller. Touchless and self-assembly based procedures seem to be a promising method for handling miniaturized components not directly fabricated at the very place where they are needed. Based on the "electrowetting on dielectrics" effect (EWOD) - a contactless handling technology well known from lab-on-chip applications for liquid transport, sorting, mixing and splitting - is used as a basis for microelectronics assembly purposes on standard printed circuit boards. Handling shall be feasible for miniaturized components as duplets, smallest SMDs as well as for nano-scaled building blocks. The physical principle is a change in the droplet contact angle of a droplet when immersed into an electrical field, an effect that can be used for droplet movement and potentially for component transport. The process flow under evaluation starts with positioning of a droplet, containing a component, on a hydrophobic surface of the carrier substrate with rough accuracy. Using the mentioned electro wetting effect the droplet will be moved quickly until the desired position is reached. The precise placement of the droplet in ?m range takes place by means of field gradients and local manipulation of the carrier surface. The assembly is finished with the evaporation of the component containing droplets and the transfer of all components to the final substrate. The experimental work on EWOD described in this paper includes electrical layout, substrate manufacturing, hydrophobic surface modification and droplet handling in- combination with a process simulation. The electrowetting conveying system is simulated using the Multi Body Dissipative Particle Dynamics method (MDPD), where clusters of fluid molecules are represented by coarse grained particles. Wetting behavior is introduced by position-fixed wall particles: the force between a wall and a fluid particle is adapted such that the required contact angle emerges. The electrowetting model uses the Lippmann equation to find the influence of the applied voltage on the wetting behavior, i.e., the attractive forces between wall and fluid particles are modified to simulate the electrostatic forces on the contact line. The micro parts are also simulated by connected particles with special interaction forces for (almost) rigid body motion.
    Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th; 01/2009
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Polymer materials - mainly epoxy resins - are widely used in microelectronics packaging. They are established in printed circuit board manufacturing, for adhesives as die attach glues or for encapsulants as molding compounds, glob tops or underfill materials. Low cost and mass production capabilities are the main advantages of these materials. But like all polymers they can not provide a hermetical sealing due to their permeability properties. The susceptibility to water diffusion through the polymer and along the interfaces is a drawback for polymer materials in general. Water inside a microelectronic package might lead to softening of the material and to a decreasing adhesive strength and resulting delaminations close to solder bumps or wire bonds reducing package reliability by decreasing the package structural integrity. During package reflow, the incorporated humidity might lead to popcorning, i.e. abrupt evaporation of humidity during reflow soldering, is one major problem during plastic package assembly. The introduction of high temperature lead- free soldering processes has even increased this issue. Therefore, plastic packaging materials with enhanced humidity resistance would increase package reliability during assembly and lifetime without cost increase and with no changes in processing. The incorporation of nano-particles into plastic packaging materials is discussed as one potential solution for improved humidity resistance as it is a rather low effort approach to material modification opposed to chemical modification of the matrix. To evaluate the potential of such additives concerning moisture resistance the effect of nano-particles mixed with a microelectronic grade epoxy resin is studied. From the large variety of fillers available this work mainly focuses on three different types: nano-sized silica, modified bentonite and zeolites. Working principles of these particles range from large surface impact of nano-particles, barrier functionality due to - stacked layer formation and molecular catcher function. Formulations with different particle concentrations and surface modifications are characterized regarding their influence on humidity diffusion, absorption and desorption behavior as well as their influence on other material properties as reaction kinetics, viscosity and thermo- mechanical properties. Additionally the combination of nano- and standard micro-particles needed for thermo-mechanical adjustment of the polymer properties is studied. Experimental work is accompanied by simulations, in order to provide further qualitative understanding on effects of particle form, size and surface properties. In summary this paper describes the potential of different nano-particles as additives for plastic packaging materials for enhanced humidity resistance/barrier enhancement within microelectronic packages. This topic is gaining increased importance when considering the trend towards system in package, where a multitude of components is encapsulated to form one SiP that incorporates a large number of different material interfaces and interconnects. All these interfaces and interconnects need to be protected from degradation caused by moisture ingress, without allowing much increased package volume or package cost. Polymers with improved moisture resistance can be one building block of future moisture resistant packages - the results of this study show their large potential for this field of application.
    Electronic Components and Technology Conference, 2008. ECTC 2008. 58th; 06/2008
  • Source
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    ABSTRACT: Recent years have shown the tremendous need for visual recording in consumer, telecom and security. Especially mobile phones have driven that trend to today's ultra-small cameras embedded into the handset. While the image capture IC features ever-decreasing pixel geometries and surging megapixel numbers, the readout circuitry and optical systems are now challenged to follow-up with this trend. This paper describes a miniaturization approach using advanced packaging techniques for the electronic system (bare die assembly in stack-wirebond and flip chip) onto a high density circuit board and leveraging a MEMS based optical system providing the possibility for a variable focus lens and aperture concept. This can give rise to a camera including the optical system with just ~3 mm times 10 mm times 10 mm total dimensions. For prototypes, some electronic bare dice are mimicked by de-capsulating the IC from the plastic housing and re- bumping it for use as flip chip. This prototype procedure is also described. Operation of the MEMS device challenges the assembly technique for particulate free manufacturing of all back end processes. Bare die assembly with wirebond and flip chip provides ultimate miniaturization onto a rigid-flex multi layer PCB. The process flow for MOEMS assembly, electronic components assembly and final housing is designed to be generically applicable to current and future needs of ultraminiaturized cameras.
    Electronic Components and Technology Conference, 2008. ECTC 2008. 58th; 06/2008
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    ABSTRACT: As the development of microelectronics is still driving towards further miniaturization new materials, processes and technologies are crucial for the realization of future cost effective microsystems and components. These future systems will not only consist of SMDs and ICs assembled on a substrate, but will potentially integrate also living cells, organelles, nanocrystals, tubules and other tiny things forming a true Heterogeneous System. Future ICs and passives will also decrease in size, e.g. for RF-ID applications forecast die sizes are smaller than 250 µm, thickness less than 50 µm and pitches way below 100 µm, passives, if not directly integrated into the system carrier, will be even smaller. New placement and joining technologies are demanded for reliable and low cost assembly of such applications, as today's packaging technologies are demanded for reliable and low cost assembly of such applications, as today's packaging technologies only allow the assembly of those small dies and components with a very high effort and for this reason with high cost. With ongoing miniaturization also the protection of the microsystems mostly realized by a polymer needs to be decreased in thickness, yet providing maximum protection. Here besides mechanical stability, humidity barrier functionality is a key factor for system reliability. Fraunhofer IZMs approaches towards packaging technologies facing the demands of future nano-based Hetero System Integration are described within this paper, compromising material and process development. Material developments focus on nano-particle enhanced polymers. One example are materials with optimized humidity barrier functionality, where various filler particle are integrated into a microelectronic grade epoxy resin and investigated regarding their barrier properties. Furthermore, the processing of nano-particle filled polymers is illustrated. Process development compromises touchless handling concepts that are promising for handling miniaturized components, not directly fabricated at the very place where they are needed. Different concepts are under evaluation. Magnetic handling can be regarded as one of the most ripened ones, thanks to the rugged approach explored. Another promising concept is the use of microdroplet manipulation by electrowetting. Results from both concepts show potential for future use. Finally advanced interconnect concepts for low temperature joining by CNT contacts or reactive interconnects are introduced. In summary an overview on nano-based technologies for heterogeneous system integration is given.
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    ABSTRACT: Flip Chip technology has been widely accepted within microelectronics as a technology for maximum miniaturization. Transfer molding is the standard process for a highly reliable encapsulation of leaded and area array packages as BGAs or CSPs. Advanced materials and process developments now allow the use of transfer molding technology for direct underfilling and / or overmolding of Flip Chip assemblies. Existing standard equipment for encapsulation can be used and no additional process step for underfill dispensing or jetting is required. Molded Flip Chips have the potential of high reliability as the low CTE of the flip chip molding compound reduces the thermal mismatch. Trends of the market drive towards SIPs with an integration of different devices. Therefore the highly reliable encapsulation of these hybrid packages with inhomogeneous topography is the goal. For testing the reliability limits and the determination of failure mechanism of molded Flip Chips a test vehicle has been designed at Fraunhofer IZM.
    Electronics Manufacturing and Technology, 31st International Conference on; 12/2007
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    ABSTRACT: The degree of integration of modern circuits has gone from singledie towards multi-die or even system partition integration. System-In-Package concepts allow to integrate in a hybrid form circuit components steming from different manufacturing processes e.g. CMOS, GaAs, MEMS as well as SMD chips. Combining Flip Chip technology, advanced PCB manufacturing, advanced assembly processes and large area overmolding, highly integrated and reliable sub-systems can be created. The paper describes the individual process steps for a GSM-Power Amplifier module, integrating the PA as a flip chip with the matching SMD components into a novel QFN concept featuring a laser structured bump-on-pad interconnect technology. Large area overmolding covers and protects the entire subsystem thus created. Manufacturing issues as well as specific fabrication details are highlighted and a reliability test shows the performance of the concept under harsh environmental load.
    Electronic Manufacturing Technology Symposium, 2007. IEMT '07. 32nd IEEE/CPMT International; 11/2007
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    ABSTRACT: In the field of microelectronics encapsulation transfer molding is the process of choice for high volume and high reliability encapsulation of microelectronics devices. The materials used for transfer molding are highly filled epoxy based systems, with typically good CTE matching to encapsulated components and high media and temperature resistance. Especially harsh environment applications as automotive, industrial or outdoor communication electronics can benefit from the intrinsic advantages of this technology. For the development of such transfer molding processes it is necessary to design and manufacture a precision mold tool, adapt it to the transfer molding system, set up the process parameters and eventually modify the mold tool to yield improved results, e.g. by a variation of the flow fronts. These processes are not only time consuming but also costly, as high precision tooling is needed. To shorten process development times or to allow a larger variation of geometrical variations a rapid tooling process would be helpful. Within the project PowerSmart such a rapid tooling process has been developed using a 3D micromachining system and selected aluminum alloy as tool material. This rapid tooling process was used to manufacture a system in package that has been developed within PowerSmart. This SiP integrates a flip chip and various SMD components; package form factor was a quad flat non leaded [QFN] package, so an area molding process with subsequent singulation by sawing was used. Within the paper the development of a prototyping technology is described and demonstrated with the development of an adapted SiP packaging technology - this is done from concept development and material selection to manufacturing process development
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    ABSTRACT: Flip Chip technology has been widely accepted within microelectronics as a technology for maximum miniaturization. Typical applications today are mobile products such as cellular phones or GPS devices. For both widening Flip Chip technology’s application range and for addressing the automotive electronics’ volume market, developing assemblies capable of withstanding high temperatures is crucial. A typical scenario for integrating electronics into a car is a control unit within the engine compartment, where ambient temperatures are around 150 °C, package junction temperatures may range from 175 °C to 200 °C and peak temperatures may exceed these values.If Flip Chip technology is used under harsh environment conditions, it is clear that especially the polymeric materials, i.e., underfiller, solder mask or the organic substrate base material, are challenged. Generally, the developmental goal for encapsulants compatible with high-temperature applications are materials with high Tg and low degradation even at temperatures >200 °C.According to these demands, a test group of advanced underfill encapsulants has been used for assembling Flip Chip devices. These test vehicles were built using lead-free and lead-containing solders such as SnAgCu and eutectic PbSn and standard FR4 substrates, for evaluating the reliability potential of state-of-the-art underfillers. Material analysis is performed for studying both material degradation as well as temperature-dependent thermo-mechanical and adhesive properties. For assessing reliability, temperature cycling is performed with different maximum test temperatures ranging from 150 °C to 175 °C. The device status is intermediately analyzed by using electrical measurement for detecting bond integrity and acoustomicroscopy for determining the occurrence and growth of delaminations. Extensive failure analysis is added to investigate device failure mechanisms, especially related to the respective test temperature.In summary, an empirical status of the high-temperature potential of state-of-the-art underfillers and material combinations is attained and an outlook on future demands and developments is provided.
    Microelectronics Reliability 01/2006; 46(1):144-154. DOI:10.1016/j.microrel.2005.06.004 · 1.43 Impact Factor
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    ABSTRACT: For improved reliability of microelectronics an encapsulation of sensitive structures is crucial, this is true especially for polymer electronics, where oxygen diffusion and water vapor ingress do dramatically influence the electrical performance. For the protection of semiconducting polymers within organic LEDs a glass layer is the method of choice, providing optimized sealing except for the edge areas. Disadvantage of glass as a sealing material is its rigidity and its sensitivity against mechanical stress. For the realization of low cost applications as smart labels / RF ID tags besides barrier properties also mechanical protection is needed to ensure device functionality. This is especially true when these devices need to operate within harsh environment. Various approaches are possible to apply such barrier layers, typically CVD/PVD or spin coating are used, to yield thin, homogeneous layers of encapsulants of 1 to 5 μm thickness. For the high speed encapsulation of large areas also lamination is discussed, where multilayer films are applied using temperature and pressure, layer thickness is in the range of 5 to 30 μm. As a further technology, suited for the deposition of low viscosity liquid barrier materials, film coating processes are proposed. Focus of the technology development described is the application of homogeneous coating on large areas. Expected advantage is the contactless application at high speed on large area substrates, especially useful on substrates showing a 3D topography, as present with devices integrating heterogeneous structures as organic semiconductors (OSC), printed passives or coils.
    Polymers and Adhesives in Microelectronics and Photonics, Polytronic, 2005. Polytronic 2005. 5th International Conference on; 11/2005
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    ABSTRACT: The Duromer molded interconnect device (MID) technology for realization of a stackable system-in-package (SiP) is similar to conventional MID technology, which is usually realized using thermoplastic polymers, combining the functionality of housing and substrate into one device. Advantages of the conventional MID technology are the reduction of parts during assembly by integrating mechanical and electrical functionality into a device and the reduction of space, as MID allows a three-dimensional (3-D) integration of devices. A disadvantage of conventional technology, especially if combined with typical technical thermoplastics, is the large mismatch in coefficient of thermal expansion (CTE) between substrate and advanced microelectronic components as chip scale package (CSP) or flip-chip. This is reducing the applicability of thermoplastic MID to moderate temperature ranges and/or to rather robust components. To overcome this disadvantage, the use of low CTE duromer as epoxy molding compounds (EMCs) as base material for device assembly is proposed, generating a unique technology well adapted to SiP and microelectromechanical system (MEMS) packaging needs, the Duromer MID approach. The technological realization of Duromer MID uses conventional backend processes as IC bonding to flex, transfer molding using epoxy molding compounds, laser machining, metallization, and structurization processes well known from PCB processing. The use of existing equipment allows both a rather fast process implementation and a cost-effective manufacturing of the components. Within this paper, the investigations described previously are driven further toward a description of a generic packaging technology integrating detailed analysis of metallization processes and assembly issues. Summarized, this paper presents further process development and feasibility analysis of wafer-level packaging technologies for SiP solutions based on a Duromer MID approach.
    IEEE Transactions on Electronics Packaging Manufacturing 11/2005; DOI:10.1109/TEPM.2005.856537 · 0.82 Impact Factor

Publication Stats

107 Citations
4.34 Total Impact Points

Institutions

  • 2001–2010
    • Fraunhofer Institute for Reliability and Microintegration IZM
      • Department of System Design and Integration
      Berlín, Berlin, Germany
  • 2009
    • Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
      München, Bavaria, Germany
  • 2008
    • University of Utah
      Salt Lake City, Utah, United States
  • 2005
    • Technische Universität Berlin
      • Research Center for Microperipherics
      Berlín, Berlin, Germany