Hag-Ju Cho

University of Texas at Austin, Austin, Texas, United States

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Publications (13)20.91 Total impact

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    ABSTRACT: Threshold voltage instability characteristics of high-k HfO<sub>2</sub> with SiON interface NMOSFETs under three different dynamic stress conditions, positive, negative, and bipolar stress, have been investigated for the first time. Frequency and duty cycle dependencies have been observed in all three conditions. In contrast to positive AC stress, negative dynamic stress showed decrease in the threshold voltage. Bipolar stress resulted in the highest threshold voltage shift, but the degradation in transconductance and subthreshold swing was actually smaller in comparison to those in negative unipolar stress. A plausible mechanism has been proposed.
    Device Research Conference, 2004. 62nd DRC. Conference Digest [Includes 'Late News Papers' volume]; 07/2004
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    ABSTRACT: We present the threshold voltage instability characteristics of high-k HfO<sub>2</sub> NMOSFET dielectric with SiON interface layer under dynamic stress. Compared to DC stress, reduced threshold voltage shift was observed at higher frequency and lower duty cycle in AC unipolar stress. Similarly, the degradation of maximum transconductance was also reduced with AC stress conditions. However, the degradation in subthreshold swing was found to be negligible and fairly independent of stress frequencies and duty cycles in AC unipolar stress. The traps in bulk of HfO<sub>2</sub> dielectric, which is proportional to its physical thickness, is believed as the primary factor for larger threshold voltage shift as the thickness of HfO<sub>2</sub> increases. Compared to the result under DC constant voltage stress, AC unipolar stress allows higher 10-year lifetime operating voltage.
    Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International; 05/2004
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    ABSTRACT: The effects of high temperature forming gas (N2:H2 = 96:4) anneal (600 °C) prior to metallization have been evaluated in terms of the improvement in the carrier mobility of HfO2/nitride layer gate stack metal-oxide-semiconductor field-effect transistors with TaN gate electrode. The high-temperature forming gas anneal has been found to be effective in improving the interface quality by lowering both interface state density and interface charges. The improvements resulting in decreased Coulombic scattering centers can be attributed to hydrogen atoms that were concentrated near the interface. © 2004 American Institute of Physics.
    Applied Physics Letters 05/2004; 84(24):4839-4841. DOI:10.1063/1.1755412 · 3.30 Impact Factor
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    ABSTRACT: This letter presents the effects of surface preparation for hafnium-based dielectrics on the bulk carrier generation rates and the carrier mobility. Different surface preparations result in different interfacial layers. Nitrogen-incorporated layers effectively block impurity penetration from hafnium oxide, and lead to the increase of bulk carrier generation lifetime. However, nitrogen-incorporated interface layers increase interface state density and degrade channel mobility, even though bulk carrier generation lifetime is increased. Thus, mobility degradation is preliminarily caused by fixed charge and interface states of the high-k dielectrics. © 2004 American Institute of Physics.
    Applied Physics Letters 03/2004; 84(12):2148-2150. DOI:10.1063/1.1689744 · 3.30 Impact Factor
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    ABSTRACT: Electrical and material characteristics of hafnium oxynitride (HfON) gate dielectrics have been studied in comparison with HfO<sub>2</sub>. HfON was prepared by a deposition of HfN followed by post-deposition-anneal (PDA). By secondary ion mass spectroscopy (SIMS), incorporated nitrogen in the HfON was found to pile up at the dielectric/Si interface layer. Based on the SIMS profile, the interfacial layer (IL) composition of the HfON films appeared to be like hafnium-silicon-oxynitride (HfSiON) while the IL of the HfO<sub>2</sub> films seemed to be hafnium-silicate (HfSiO). HfON showed an increase of 300°C in crystallization temperature compared to HfO<sub>2</sub>. Dielectric constants of bulk and interface layer of HfON were 21 and 14, respectively. The dielectric constant of interfacial layer in HfON (∼14) is larger than that of HfO<sub>2</sub> (∼7.8). HfON dielectrics exhibit ∼10× lower leakage current (J) than HfO<sub>2</sub> for the same EOTs before post-metal anneal (PMA), while ∼40× lower J after PMA. The improved electrical properties of HfON over HfO<sub>2</sub> can be explained by the thicker physical thickness of HfON for the same equivalent oxide thickness (EOT) due to its higher dielectric constant as well as a more stable interface layer. Capacitance hysteresis (ΔV) of HfON capacitor was found to be slightly larger than that of HfO<sub>2</sub>. Without high temperature forming gas anneal, nMOSFET with HfON gate dielectric showed a peak mobility of 71 cm<sup>2</sup>/Vsec. By high temperature forming gas anneal at 600°C, mobility improved up to 256 cm<sup>2</sup>/Vsec.
    IEEE Transactions on Electron Devices 03/2004; 51(2-51):220 - 227. DOI:10.1109/TED.2003.821707 · 2.47 Impact Factor
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    ABSTRACT: The electrical, material, and reliability characteristics of zirconium oxynitride (Zr-oxynitride) gate dielectrics were evaluated. The nitrogen (∼1.7%) in Zr-oxynitride was primarily located at the Zr-oxynitride/Si interface and helped to preserve the composition of the nitrogen-doped Zr-silicate interfacial layer (IL) during annealing as compared to the ZrO<sub>2</sub> IL - resulting in improved thermal stability of the Zr-oxynitride. In addition, the Zr-oxynitride demonstrated a higher crystallization temperature (∼600°C) as compared to ZrO<sub>2</sub> (∼400°C). Reliability characterization was performed after TaN-gated nMOSFET fabrication of Zr-oxynitride and ZrO<sub>2</sub> devices with equivalent oxide thickness (EOTs) of 10.3 Å and 13.8 Å, respectively. Time-zero dielectric breakdown and time-dependent dielectric breakdown (TDDB) characteristics revealed higher dielectric strength and effective breakdown field for the Zr-oxynitride. High-temperature forming gas (HTFG) annealing on TaN/Zr-oxynitride nMOSFETs with an EOT of 11.6 Å demonstrated reduced D<sub>it</sub>, which resulted in reduced swing (69 mV/decade), reduced off-state leakage current, higher transconductance, and higher mobility. The peak mobility was increased by almost fourfold from 97 cm<sup>2</sup>/V·s to 383 cm<sup>2</sup>/V·s after 600°C HTFG annealing.
    IEEE Transactions on Electron Devices 03/2003; 50(2-50):333 - 340. DOI:10.1109/TED.2002.808531 · 2.47 Impact Factor
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    ABSTRACT: Hafnium oxynitride (HfOxNy) gate dielectric was prepared using reactive sputtering followed by postdeposition annealing at 650 °C in a N2 ambient. Nitrogen incorporation in the dielectric was confirmed by x-ray photoelectron spectroscopy analysis. In comparison to HfO2 of the same physical thickness, HfOxNy gate dielectric showed lower equivalent oxide thickness (EOT) and lower leakage density (J). Even after a high-temperature postmetal anneal at 950 °C, an EOT of 9.6 Å with J of 0.8 mA/cm2 −1.5 V was obtained. In contrast, J of ∼ 20 mA/cm2 −1.5 V for HfO2 with an EOT of 10 Å was observed. The lower leakage current and superior thermal stability of HfOxNy can be attributed to the formation of silicon–nitrogen bonds at the gate dielectric/Si interface and strengthened immunity to oxygen diffusion by the incorporated nitrogen. © 2002 American Institute of Physics.
    Applied Physics Letters 09/2002; 81(14):2593-2595. DOI:10.1063/1.1510155 · 3.30 Impact Factor
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    ABSTRACT: The effects of silicon surface nitridation on metal–oxide–semiconductor capacitors with zirconium oxide (ZrO2) gate dielectrics were investigated. Surface nitridation was introduced via ammonia (NH3) annealing prior to ZrO2 sputter-deposition, and tantalum nitride (TaN) was used for the gate electrode. It was found that capacitors with the nitridation had thinner equivalent oxide thickness (∼8.7 Å), comparable leakage current, and slightly increased capacitance–voltage hysteresis as compared to samples without nitridation. Additionally, transmission electron microscopy pictures revealed that nitrided samples had a thicker interfacial layer (IL), which had a higher dielectric constant than that of the non-nitrided IL. © 2002 American Institute of Physics.
    Applied Physics Letters 08/2002; 81(9):1663-1665. DOI:10.1063/1.1504165 · 3.30 Impact Factor
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    ABSTRACT: A novel technique to control the nitrogen profile in HfO/sub 2/ gate dielectric was developed using a reactive sputtering method. The incorporation of nitrogen in the upper layer of HfO/sub 2/ was achieved by sputter depositing a thin Hf/sub x/N/sub y/ layer on HfO/sub 2/, followed by reoxidation. This technique resulted in an improved output characteristics compared to the control sample. Leakage current density was significantly reduced by two orders of magnitude. The thermal stability in terms of structural and electrical properties was also enhanced, indicating that the nitrogen-doped process is effective in preventing oxygen diffusion through HfO/sub 2/. Boron penetration immunity was also improved by nitrogen-incorporation. It is concluded that the nitrogen-incorporation process is a promising technique to obtain high-k dielectric with thin equivalent oxide thickness and good interfacial quality.
    IEEE Electron Device Letters 06/2002; 23(5-23):249 - 251. DOI:10.1109/55.998866 · 2.75 Impact Factor
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    ABSTRACT: Time dependent dielectric breakdown and bias temperature instability of HfO<sub>2</sub> devices with polysilicon gate electrodes are studied. Both N and PMOS capacitors have sufficient TDDB lifetime, whereas PMOS capacitors show gradual increase in the leakage current during stress. HfO<sub>2</sub> PMOSFET's without nitridation have sufficient immunity against negative bias temperature instability. Bias temperature instability for NMOS can be a potential scaling limit for HfO<sub>2</sub>.
    Reliability Physics Symposium Proceedings, 2002. 40th Annual; 02/2002
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    ABSTRACT: The effects of high-temperature deuterium annealing on MOSFETs with HfO<sub>2</sub> gate dielectric and TaN gate electrode has been studied and compared to the control and forming gas (FG) annealed samples. Both FG and D<sub>2</sub> anneal improved interface qualities and resulted in better MOSFET characteristics in comparison to control samples. These improvements resulted from both the additional thermal budget of high temperature anneal and the improvement of interface quality caused by the hydrogen and deuterium atoms. But unlike FG D<sub>2</sub> anneal showed negligible degradation of reliability.
    Electron Devices Meeting, 2002. IEDM '02. International; 02/2002
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    ABSTRACT: Effects of forming gas (FG) annealing on HfO<sub>2</sub> MOSFET performance have been studied. High-temperature (500-600°C) FG annealing has been shown to significantly improve carrier mobility and subthreshold slopes for both N and PMOSFETs. The improvement has been correlated to the reduction in interfacial state density. The effectiveness of FG annealing has also been examined on samples that underwent surface preparations with NH<sub>3</sub> or NO annealing prior to HfO<sub>2</sub> deposition. It was found that FG annealing did not degrade PMOS negative bias temperature instability characteristics.
    VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on; 02/2002
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    ABSTRACT: The performance of polysilicon gate HfO<sub>2</sub> MOSFET's is discussed in terms of gate leakage current and the effects of NH<sub>3 </sub> surface nitridation on boron penetration and carrier mobility. Negative bias temperature instability (NBTI) on HfO<sub>2</sub> PMOSFET's was evaluated for the first time. Although surface nitridation enhanced NBTI degradation, HfO<sub>2</sub> PMOSFET's without nitridation show sufficient NBTI immunity
    Electron Devices Meeting, 2001. IEDM Technical Digest. International; 02/2001