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Publications (1)0 Total impact

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    ABSTRACT: This paper presents a clock generator dedicated to front-end processors for LCD and plasma monitor video applications. The topology is based on a factorial DLL, which can support all kind of standards (from VGA up to SXGA). Fabricated in a 2.5 V, 0.25 μm, 6-metal CMOS VLSI process from STMicroelectronics, the maximum r.m.s. measured jitter is 17 ps. The power consumption is 17 mW at 200 MHz output frequency. The low cost area (0.08 mm<sup>2</sup>) and the fully integrated structure make it well suited for such a video market
    Custom Integrated Circuits, 2001, IEEE Conference on.; 02/2001