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ABSTRACT: This paper presents an analysis of rigid-body joint-angle measurement based on microelectromechanical-system (MEMS) biaxial accelerometers and uniaxial gyroscopes. In comparison to conventional magnetic and optical joint angular sensors, this new inertial sensing principle has the advantages of flexible installation and true contactless sensing. This paper focuses on the comparison of four different inertial-sensor combination methods that are reported in reference papers and utilizes the theory of rigid-body kinematics to explain and analyze their advantages and weaknesses. Experiments have also been conducted to further verify and strengthen the arguments put forward in the analysis. All experiments in this paper took place on a custom-built rigid-body robot arm model that can be manipulated by hand. Sensor calibration and accelerometer alignment issues are also described, and their details are discussed. The experiment results presented in this paper show significant differences with reference to the achieved angular accuracy for various situations when using the four different sensor combination methods. In some cases, the angular error based on one method is more than 0.04 rad, while that from another method is within ??0.005 rad. The noise levels of angular readings from different methods are also experimentally compared and analyzed. The conclusion drawn serves to guide readers toward a suitable method for their particular application.
IEEE Transactions on Instrumentation and Measurement 03/2010; · 1.21 Impact Factor
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ABSTRACT: This paper will discuss a wireless control system for a loader crane, where the focus lies on the wireless communication protocol supporting the implementation of the real-time system. To aid the discussion, a system model is included, which together with the control strategy will allow low power consumption for the energy constraint sensor devices. A simple and power aware medium access control protocol is proposed. The protocol together with the specific loader crane requirements make it possible to save valuable sensor resources. Simulations on real world loader crane data show a simplified view of the power requirements for the control model, and the importance of utilizing correct system parameters to achieve low power consumption.
Industrial Electronics, 2008. ISIE 2008. IEEE International Symposium on; 08/2008
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ABSTRACT: In this paper, a new, real-time reconfigurable perceptron circuit element is presented. A six-transistor version used as a threshold gate, having a fan-in of three, producing adequate outputs for threshold of T =1, 2 and 3 is demonstrated by chip measurements. Subthreshold operation for supply voltages in the range of 100-350 mV is shown. The circuit performs competitively with a standard static complimentary metal-oxide-semiconductor (CMOS) implementation when maximum speed and energy delay product are taken into account, when used in a ring oscillator. Functionality per transistor is, to our knowledge, the highest reported for a variety of comparable circuits not based on floating gate techniques. Statistical simulations predict probabilities for making working circuits under mismatch and process variations. The simulations, in 120-nm CMOS, also support discussions regarding lower limits to supply voltage and redundancy. A brief discussion on how the circuit may be exploited as a basic building block for future defect tolerant mixed signal circuits, as well as neural networks, exploiting redundancy, is included.
IEEE Transactions on Neural Networks 05/2008; 19(4):645-57. · 2.95 Impact Factor
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ABSTRACT: This paper presents the analysis for joint angle measurement on rigid body that is based on distributed biaxial MEMS accelerometers. It focuses on two methods, one called CMR and another DCMR, and utilizes the property of rigid body kinematics to explain their advantages and weaknesses. Unlike CMR method, DCMR method has no requirement on placing the sensors close to the joint center. This provides greater flexibility for the sensor installation. On the basis of the error model of CMR method, we give an analysis outlining the advantage of theoretically error-free DCMR method. The sensor calibration and alignment is described and both methods are characterized on a rigid body robot arm model. The experiment shows the angular error up to 0.4 rad from CMR method whereas just 0.03 rad from DCMR method. The noise level from both methods is also compared and analyzed The result reveals a larger but tunable noise for DCMR method.
Industrial Electronics Society, 2007. IECON 2007. 33rd Annual Conference of the IEEE; 12/2007
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ABSTRACT: In this paper the use of the IEEE 802.15.4 standard in a wireless control system is analyzed and discussed. The standard is described and applied on a heavy duty crane application and the discussion focuses on the possibilities and limitations of the standard in the application. A formula is presented which can be used to calculate maximum sample rate according to the number of sensor nodes and the payload the nodes may carry. The discussion reveals that the standard may be utilized in the crane application but that it is not a good solution. Several limitations within the standard, such as network size and system sample rate, will put a stop to future extensions of the wireless control system. As a result, the 802.15.4 standard protocol shall not be employed in the heavy duty crane application.
Industrial Embedded Systems, 2007. SIES '07. International Symposium on; 08/2007
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ABSTRACT: A wireless sensor network is always an integrated part of a system. The physical and logical structure of the system, where the sensor network is integrated, are together with other environmental requirements the constraints for the design of the network and the wireless sensor devices. These requirements are very different for different applications and even for one specific system the requirements may be very different on the sensor devices. When developing efficient wireless sensor devices these constraints must be taken into consideration. The diverse constraints we are facing when developing wireless sensor networks and devices for various applications makes it necessary to have a platform-based development approach where as much of the components can be re-used. For the communication, the standard IEEE 802.15.4 provides an excellent platform for developing short range power aware sensor networks. In this paper a hardware platform is presented with its modular structure it provides a highly flexible solution suitable for rapid prototyping of wireless sensors. This platform is a tool for developers of wireless sensor devices as well as system integrators that need to explore different system solutions experimentally
IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference on; 12/2006
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ABSTRACT: This paper proposes an area- and power-efficient implementation of the read-out electronics for color X-ray pixel detectors for imaging. Introducing multiple levels of energy discrimination increases the complexity of the read-out electronics in each pixel. The proposed architecture has full resolution for the intensity and reduced resolution for the energy spectrum (color), which leads to a good compromise of image quality and circuit complexity. The authors show that the increase in complexity, compared to single energy-range pixel, leads to increase in circuit area of less than 20%
Norchip Conference, 2006. 24th; 12/2006
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ABSTRACT: An efficient way to obtain finite-state machines (FSMs) with low-power consumption is to partition the machine into two or more sub-FSMs and then use dynamic power management where all sub-FSMs not active are shut down, with the effect of reducing dynamic power dissipation. Thus, FSM partitioning algorithms and register-transfer-level power estimation functions are the main focus of the paper as these are key issues in the design of a computer-aided design tool for synthesis of low-power partitioned FSMs. An implementation architecture is targeted, which is based on both synchronous and asynchronous state memory elements that enable larger power reductions than fully synchronous architectures do. Power reductions of up to 77% have been achieved at a cost of an 18% increase in area.
IEE Proceedings - Computers and Digital Techniques 08/2006;
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ABSTRACT: We propose a coding algorithm called unary prefixed Huffman (UPH) coding for a family of infinite sources called quantized generalized Gaussian (GG) sources. Compared with the existing codes for these GG sources, the UPH algorithm provides a more adaptive approach, and its coding efficiency is upper bounded by entropy +2
IEEE Transactions on Communications 08/2006; · 1.68 Impact Factor
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ABSTRACT: This work proposes an efficient circuit implementation of a mechanism for charge-sharing suppression in photon-counting pixel arrays based on current-mode circuits for the analog parts. The additional circuits needed for charge-sharing suppression in a four-pixel cluster, leads to an increase in power consumption of 36% and only a marginal increase in circuit area. The implemented pixel with window-discrimination, managing charge-sharing in a four-pixel cluster and with an event-counter of 13 bits, consists of 300 transistors and has a power consumption of 2.7 μW when idle. It is implemented in a 120nm CMOS process and the presented results are based on simulations.
NORCHIP Conference, 2005. 23rd; 12/2005
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ABSTRACT: A unary-prefixed encoding (UPE) algorithm for coding the lengths of zeros in a bit vector is proposed. While the lengths of consecutive zeros in a bit vector can be mapped to integer sources with a geometrical distribution (when the bits in the bit vector are independent of each other), the actual case, in a real-world situation, is more often that the distributions are exponential, with high peaks and heavier tails (when the bits in a bit vector are correlated). For the geometric distribution, the UPE code set can be proven to be optimal. For integer sources with high peaks and heavier tails, the UPE almost always provides better compression compared to existing suboptimal codes.
Electronics Letters 04/2005; · 0.96 Impact Factor
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Norchip Conference, 2004. Proceedings; 12/2004
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Norchip Conference, 2004. Proceedings; 12/2004
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ABSTRACT: We present an idea for a new real-time reconfigurable perceptron, also called, a threshold element. The circuit example contain three inverters with shorted outputs. SPICE simulations for a 0.6 μm CMOS implementation operating in the subthreshold region. are shown. The threshold voltages of the active devices, seen from driving nodes, may be dynamically changed by adjusting their substrate potentials. This enables a change of the threshold of the perceptron circuit in real-time. In terms of Boolean logic the functionality may be changed between 3-input NOR, CARRY' for the FULL-ADDER function and 3-input NAND, in real-time.
Neural Networks, 2004. Proceedings. 2004 IEEE International Joint Conference on; 08/2004
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ABSTRACT: Variable length code (VLC) is used in a large variety of lossless compression applications. A specially designed VLC, called "universal variable length code" (UVLC), is utilized in the latest video coding standard H.26L under development. In this work we propose a coding method that we call "alternating coding" (ALT coding) for UVLC. An efficient UVLC decoder is designed (ALT decoder) on the basis of it. ALT coding facilitates a much easier decoding scheme for UVLC. It frees the decoder from codeword tables and the sizes of the barrel shifters are reduced. The codeword tables and barrel shifters usually occupy the largest portion of the area in the traditional VLC decoders and they are also performance limiting in terms of speed and power consumption. We compare the ALT decoder with one of the most efficient VLC decoders called "VLC decoder using plane separation" (PLS). Our results show that the ALT decoder increases 257% in speed, decreases 41% in size, and consumes 45% power of the PLS decoder.
Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the 3rd International Symposium on; 10/2003
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ABSTRACT: Variable length code (VLC) is used in a large variety of lossless compression applications. A specially designed VLC, called "universal variable length code" (UVLC), is utilized in the latest video coding standard H.26L under development. In this work we propose a new coding method under the name "alternating coding" (ALT coding) and apply it to the UVLC. The ALT coded UVLC yields the same high coding efficiency as the original UVLC, but ALT coding also enables immediate decoding, immediate error detection and location in a UVLC packet. It improves the error resiliency and error robustness of the UVLC packet by applying an "error speculation". Results show that the ALT coded UVLC packet always outperforms the original UVLC packet in terms of error resiliency and robustness. Moreover, the simple pattern of ALT coded UVLC can greatly simplify the UVLC decoder architecture and therefore enables small, fast, and low-power decoder design.
Image Processing, 2003. ICIP 2003. Proceedings. 2003 International Conference on; 10/2003
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ABSTRACT: The authors develop a class of codes for quantised generalised Gaussian (GG) sources. This new class of codes, that are called hybrid Golomb (HG) codes, are hybrids of Golomb-Rice (GR) codes and exp-Golomb (EG) codes. They integrate the properties of both GR and EG codes, which makes their performance more robust under variable source parameters. The efficiencies of the three classes of codes are compared and it is shown that the set of HG codes have efficiencies of approximately 70% or greater for a wide range of parameter values, whereas GR and EG codes can have efficiencies lower than 20%. The efficiencies of the set of HG codes are also compared with the set of EG codes that have the best performance under parameter scaling. It is shown that this set of HG codes still achieve a higher efficiency.
IEE Proceedings - Vision Image and Signal Processing 09/2003;
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ABSTRACT: We present a method, based on SystemC, for quantification of noise coupling in mixed-signal systems, called BeNoC. Our method facilitates seamless quantification of both the power distribution network and substrate noise coupling at the behavioral level. The main contribution of this approach is the integration of noise coupling simulation with behavioral functional simulation. Starting from a behavioral model of the system, captured in SystemC, we add wrappers to each block in the behavioral model. These wrappers add an estimated power consumption model for each block, which is triggered by events in the behavioral simulation. The noise coupling simulation is then done by connecting the different blocks according to a virtual layout and technology parameters. The resulting noisy substrate or noisy power distribution network can then be fed back into the behavioral model. Thus, effects on the system behavior can be analyzed. We focus on noise coupling over the power distribution network and demonstrate the usability of the noise coupling simulation technique. The simulation results are compared with circuit simulations in SPICE.
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on; 06/2003
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ABSTRACT: This paper presents methods for early estimation of digital to analog noise coupling over the power distribution network in mixed-signal systems. The methods allow both behavioral verification of mixed-signal architectures and their sensitivity to noise coupling of the power distribution network. The behavioral level noise coupling simulation models are implemented as extensions to the SystemC system design language. To illustrate the effectiveness of the proposed methods, we have estimated the power distribution network noise for a photon-counting X-ray pixel array and compared this with SPICE simulations.
Mixed-Signal Design, 2003. Southwest Symposium on; 03/2003
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ABSTRACT: This paper presents methods for early quantification Of digital to analog noise coupling at behavioral level. The methods enable designers to both verify the behavior of their mixed-signal architecture and its sensitivity to noise coupling. The high-level noise coupling simulation models are implemented as extensions to SystemC.
VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on; 03/2003
