F. Pescador

Universidad Politécnica de Madrid, Madrid, Madrid, Spain

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Publications (47)12.33 Total impact

  • IET Computers & Digital Techniques 01/2015; 9(1):3-15. DOI:10.1049/iet-cdt.2014.0087 · 0.36 Impact Factor
  • J. Wei, R. Ren, E. Juarez, F. Pescador
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    ABSTRACT: This paper provides a concrete implementation and comprehensive assessment of the energy-based fair queuing (EFQ) scheduling algorithm based on the Linux operating system. EFQ is an extended application of the classical fair queuing algorithm in the energy domain. It is designed to provide proportional power sharing as well as effective time-constraint compliance in energy-centric power management (PM) schemes, a type of operating system-level PM schemes that are targeted at providing a battery lifetime guarantee for energy-limited mobile systems. In this paper work, the structure of the Linux completely fair scheduler (CFS) has been effectively utilized to ease the EFQ implementation and reduce the scheduling overhead. Around 150 lines of code have been added to the Linux kernel V3.3 to achieve the EFQ-related functions and to implement the system calls that are required by the Linux user space. To assess the properties of the EFQ scheduler, a test-bench based on the POSIX threads has been developed and the benchmarks of an open-source embedded suite are referred to program the threads under test. The EFQ algorithm is assessed from two aspects, energy management and real-time scheduling. Experimental results on energy management show that EFQ is more effective than the CFS scheduler in managing energy and it can achieve a proportional share of the system power regardless of on which device the energy is spent. Experimental results on real-time scheduling demonstrate that EFQ can achieve strict time-constraint compliance and a robust response time upon the increase of energy estimation error and active tasks.
    IEEE Transactions on Consumer Electronics 05/2014; 60(2):267-275. DOI:10.1109/TCE.2014.6852003 · 1.16 Impact Factor
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    ABSTRACT: The new High Efficiency Video Codec (HEVC) standard will replace H.264 soon in consumer multimedia applications. The open source project OpenHEVC is working on an efficient implementation of the HEVC decoder in C language. In this paper, an HEVC decoder based on OpenHEVC for DSP technology is presented. The tests show that it outperforms by 2.3 a previously developed HM9.0-based decoder for the same DSP.
    2014 IEEE International Conference on Consumer Electronics (ICCE); 01/2014
  • R. Ren, E. Juarez, C. Sanz, M. Raulet, F. Pescador
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    ABSTRACT: In this paper, an on-line energy estimation model has been implemented on an RVC-CAL HEVC decoder. The model is driven by Performance Monitoring Counters and fitted by the MARS method. The estimation results achieve average relative errors less than 10%. In addition, the model computation overhead is less than 0.5%. The model might be employed within the RVC framework to provide an energy-aware decoder reconfiguration.
    2014 IEEE International Conference on Consumer Electronics (ICCE); 01/2014
  • J. Wei, E. Juarez, M. J. Garrido, F. Pescador
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    ABSTRACT: In this paper, an implementation of the energy-based fair queuing (EFQ) scheduling algorithm based on Linux is presented. EFQ is an extended application of the fair queuing algorithm in the domain of energy management for achieving proportional energy use among user applications. The Linux scheduling structure has been effectively utilized to ease the EFQ implementation and reduce the scheduling overhead. A test-bench based on the POSIX threads and newly added system calls has been developed to assess the EFQ scheduler on an ARM-based platform. Experiment results show that EFQ is more effective than the Linux scheduler in managing energy and maximizing the user experience of battery-limited mobile systems.
    2014 IEEE International Conference on Consumer Electronics (ICCE); 01/2014
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    ABSTRACT: Motivated by the pervasive use of multimedia applications in battery-powered portable devices, the latest video coding standards have been developed to enable higher data compression rates and decoding efficiencies. An MPEG Reconfigurable Video Coding (RVC) framework has been proposed to efficiently support multiple codec specifications and facilitate innovation in codec design. At the same time, an energy-aware design is expected to be included in video coding standards for the purpose of energy optimization of multimedia applications, which are known to create high computational loads. This paper proposes an energy-aware decoder manager based jointly on a Just-In-Time Adaptive Decoder Engine (Jade) and an energy estimation model. The model is driven by Performance Monitoring Counters (PMCs) and is fitted by the multivariate adaptive regression splines (MARS) method. The estimation results achieve average relative errors of less than 10%. In addition, the maximal model computation overhead is 4.58%. By combining the estimation model into the RVC framework, the experimental results show good potential for energy efficiency improvement with increases of up to 21.8% based on energy considerations.
    IEEE Transactions on Consumer Electronics 01/2014; 60(3):499-507. DOI:10.1109/TCE.2014.6937336 · 1.16 Impact Factor
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    ABSTRACT: During the last decades, new video compression standards arose every few years with always higher compression gains and considerable increases on the computational cost. Single core processors have reached their limit and multicore processors are there to overcome this issue to give more processing power. In order to accelerate the implementation of new video coding standards, MPEG has standardized an alternative framework to describe video decoders. It is based on reference decoders written in the RVC CAL dataflow actor language. From these descriptions, a compiler - Open RVC CAL compiler (Orcc) - allows the automatic generation of C code dedicated to the target processor. In this paper, a DSP based decoder compliant with the new High Efficiency Video Coding (HEVC) standard has been implemented using a CAL RVC model as a starting point. This is the first implementation of an HEVC decoder with DSP technology based on a HEVC RVC CAL model. The decoder has been compared in performance with a GPP implementation, also based on the RVC CAL model, and outperforms it by more than 50%. Additionally, the performance of this decoder is compared with that of other DSP-based HEVC decoders implemented without using the Orcc infrastructure1.
    IEEE Transactions on Consumer Electronics 11/2013; 59(4):839-847. DOI:10.1109/TCE.2013.6689697 · 1.16 Impact Factor
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    ABSTRACT: In this paper, an energy estimation methodology based on performance monitor counters (PMC) is proposed to estimate the energy consumption of RVC-CAL video codec specifications. The proposed PMC-driven methodology is able to automatically identify the most appropriate events and training data to cover the main application characteristics. In addition, knowledge of the hardware platform employed is not required. Therefore, this methodology can be easily implemented on other PMC-available systems while keeping the estimation accuracy. It is worth noting that this is an attractive asset to analyze the energy consumption of RVC-CAL codec specifications. Besides, the methodology reduces the PMC redundancy and, thus, the overhead introduced when applied to on-line power management. Experimenting on two RVC-CAL decoders, H.264 and MPEG4 Part2 SP, a coarse estimation model based on instructions per cycle (IPC) and the proposed PMC-driven model are compared. The results show that the PMC-driven model can achieve for the H.264 and MPEG4 Part2 SP decoders average estimation errors of 5.95% and 5.01%, respectively, in comparison to the 17.11% and 13.65% average errors obtained with the IPC-based model. As a consequence, this methodology is suggested to be combined into the RVC framework to help the designer to have an overview of the energy consumption of the specification actors at earlier design stages.
    Signal Processing Image Communication 11/2013; 28(10):1303–1314. DOI:10.1016/j.image.2013.08.014 · 1.15 Impact Factor
  • J. Wei, E. Juarez, M. J. Garrido, F. Pescador
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    ABSTRACT: Currently, the usefulness of many mobile systems is largely limited by the battery lifetime. In this paper, energy-based fair queuing (EFQ) is proposed as a pivotal instrument to maximize the user experience in this type of system. Energy-based fair queuing is a novel class of energy-aware scheduling algorithms that support proportional energy use, effective time-constraint compliance and a flexible trade-off between them. The combination of EFQ with lifetime-oriented power management schemes opens the door to maximize the user experience of battery-limited mobile systems. Moreover, it is suggested to merge traditional energy-efficient algorithms with EFQ to further improve the user experience. The proposed EFQ algorithm is implemented in the Linux kernel V3.3 and verified on a testbench based on an open source Linux scheduler simulator with user-specified energy loads. Simulation results show that EFQ is more effective and flexible than the Linux scheduler in maximizing the user experience of energy-limited mobile systems.
    IEEE Transactions on Consumer Electronics 08/2013; 59(3):690-698. DOI:10.1109/TCE.2013.6626257 · 1.16 Impact Factor
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    ABSTRACT: High Efficiency Video Coding (HEVC) is a new video coding standard created by the JCT-VC group within ISO/IEC and ITU-T. HEVC is targeted to provide the same quality as H.264 at about half of the bit-rate and will replace soon to its predecessor in multimedia consumer applications. Up to now, only a few decoder implementations have been reported, most of them oriented to carry out a complexity analysis. In this paper, a DSP-based implementation of the HEVC HM9.0 decoder is presented. Up to the best of our knowledge, it is the first DSP-based implementation shown in the scientific literature. Several tests have been carried out to measure the decoder performance and the computational load distribution among its functional blocks. These results have been compared with the ones obtained with the decoder implementations reported up to date. Finally, based on the results obtained in previous works regarding software optimization of DSP-based decoders, realtime could be achieved for SD formats with a single DSP after optimizing our HEVC decoder. For HD formats, multi-DSP technology will be needed.
    IEEE Transactions on Consumer Electronics 05/2013; 59(2):391-399. DOI:10.1109/TCE.2013.6531122 · 1.16 Impact Factor
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    ABSTRACT: In this paper, the implementation of a Multi-DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. An optimized single DSP-based decoder implementation has been splitted in two processes: the frame decoding (entropy decoding and motion compensation) and the deblocking filter. A multi-DSP device has been used to parallelize the execution of the processes. The performance has been measured using H.264/SVC sequences with different configurations.
    Consumer Electronics (ISCE), 2013 IEEE 17th International Symposium on; 01/2013
  • J. Wei, E. Juarez, M.J. Garrido, F. Pescador
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    ABSTRACT: This paper extends the traditional fair queuing scheduling to the energy management domain, and presents the energy-based fair queuing scheduling, a novel class of energy-aware scheduling algorithms that support proportional energy use, effective time-constraint meeting and a flexible trade-off between them. The proposed algorithm, in combination with a mechanism that restricts the battery discharge rate, can achieve a target lifetime for Operating System (OS)-based mobile devices by including total energy consumption on all system components and systematically managing energy as the first-class resource.
    Consumer Electronics (ICCE), 2013 IEEE International Conference on; 01/2013
  • F. Pescador, M.J. Garrido, E. Juarez, C. Sanz
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    ABSTRACT: High Efficiency Video Coder (HEVC) will become a new MPEG International Standard by the end of 2012. HEVC is targeted to provide the same quality as H.264 at about a half of the bit-rate and will replace soon to its predecessor in multimedia consumer applications. In this paper, a preliminary implementation of an HEVC video decoder based on a DSP is presented and compared with a formerly developed H.264 DSP-based decoder.
    Consumer Electronics (ICCE), 2013 IEEE International Conference on; 01/2013
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    ABSTRACT: An implementation of a real-time 3D videoconferencing system using the currently available technology is presented. This approach is based on the side by side spatial compression of the stereoscopic images. The encoder and the decoder have been implemented in a standard personal computer and a conventional 3D compatible TV has been used to present the frames. Moreover, the users without 3D technology can use the system because 2D compatibility mode has been implemented in the decoder. The performance results show that a conventional computer can be used for encoding/decoding audio and video streams and the delay in the transmission is lower than 200 ms.
    01/2012; DOI:10.1109/ICCE.2012.6161789
  • J. Wei, E. Juarez, F. Pescador, M.J. Garrido
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    ABSTRACT: In this paper we introduce the Starting-Energy Fair Queuing (SEFQ), a novel class of energy-aware scheduling algorithms aim to guarantee a target lifetime to mobile devices while providing proportional energy consumption and time-constraint meeting to tasks. With the extension of fair queuing to the energy domain, energy consumption of CPU is managed in a way that each task is guaranteed a share of the average power of a fixed period. The simulation results show that the performance of time-sensitive tasks can be traded-off with their fairness.
    Consumer Electronics (ISCE), 2012 IEEE 16th International Symposium on; 01/2012
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    ABSTRACT: The implementation of the curriculum within the EEES in EUIT of Telecommunications of the UPM has enabled a structure to implement the teachings of microprocessors based on the cooperative work. This methodology is based on the development of projects with increasing complexity. This paper details the methods used in each course and resources used. While the academic results obtained to date can not be considered significant because it has not yet been implemented throughout the curriculum, the academic performance of students who have completed these courses have been very favorable.
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    ABSTRACT: In this paper, a H.264/SVC compliant video client based on a SoC is presented. The SoC includes two processors, a General Purpose Processor to execute a Linux-based operating system and a Digital Signal Processor optimized to decode video sequences. The computational load of the application has been distributed between both processors. The performance results demonstrate that the developed system is able to decode six-layer scalable sequences in real-time.
    Consumer Electronics (ISCE), 2012 IEEE 16th International Symposium on; 01/2012
  • R. Ren, E. Juarez, F. Pescador, C. Sanz
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    ABSTRACT: In this paper, a methodology which aims to solve the accuracy susceptibility problem in PMC-driven energy estimation models is developed. The application characteristics representativeness of PMCs and training benchmarks to generate an accurate and stable energy estimation model are considered. The results show a good accuracy and stability with average relative error of 4.8%.
    Consumer Electronics (ISCE), 2012 IEEE 16th International Symposium on; 01/2012
  • Source
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    ABSTRACT: The value of project-based learning has lead to the inclusion of project development activities in engineering courses, being the Final Year Project (FYP) the most remarkable one. Several approaches have been proposed for assessing and grading FYPs but, among them, rubrics are becoming a standard for such type of assessment. However, due to the different characteristics and orientations of the projects (some are more practically oriented, some more theoretically), and the high amount of different competences to be evaluated (knowledge, working capability, communication skills, etc.), the definition of one unique rubric suitable for the evaluation of all FYPs presented in different degree programs, is a big challenge. In a former work, the educational outcomes expected from the FYP were defined and resulted in a proposal for their assessment. Afterwards, the proposal has been tested during one year within an educational innovation-project at the Universidad Politécnica de Madrid which involved the follow-up of 8 undergraduate telecommunication students elaborating their FYPs. In this publication, our experience will be described, based on the emerging work taking place through the formalisation of the process which consisted in the following steps: i) establishment of a schedule for the whole process (publication of FYPs topics, selection of applying students and their enrolment, assignation of a jury to each FYP, elaboration and follow-up of FYPs, final report submission, oral presentation, etc.); ii) design of rubrics for each of three assessment parts: working process, final report and oral presentation; and iii) follow-up and evaluation of the involved FYPs. Finally, problems that appeared during this experience (e.g. administrative aspects, criticisms and suggestions from the students, tutors and juries involved) are discussed and some modifications in the assessment system will be proposed in order to solve or minimize these problems.
    ICERI2011 Conference; 11/2011