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ABSTRACT: Recent mixed-signal circuits designed in deep sub-micron technologies uses 5-7 interconnection layers. The distributed capacitance between these layers, the increased resistance of the current path, due to the high W/L ratio, and the inductances of the terminals act as complex loads for the MOS transistors operated at small signal. This paper studies the behaviour of the sub-micron MOS transistors with mixed (resistive/inductive) loads and points out several methods for improving the circuit parameters. The aspect of the distributed resistance and capacitance of the interconnection lines between the circuit and the load is also discussed. The wire sizing problem, which for a great part of the circuit designers is based on the DC value, is analysed from a new point of view: signal propagation.
Semiconductor Conference, 2005. CAS 2005 Proceedings. 2005 International; 11/2005
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ABSTRACT: The Silicon On Insulator technology has reached a new stage through the nanodevices way: Silicon On Nothing, where "Nothing" means a vacuum cavity underneath an ultrathin Si film. A mobile and thin semiconductor membrane results, by enlarging the cavity. In the empty space can be handled a bioliquid using a diffuser/nozzle micropump. The mobile Si membrane is bending by the substrate biasing and plays a double role: as actuator and detector. This paper presents a MEMS, based on a new work principle than traditional ISFETs, which detects the ionic analytes from a bioliquid and has its own actuator for the microfluidic handle.
Semiconductor Conference, 2005. CAS 2005 Proceedings. 2005 International; 11/2005
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ABSTRACT: In sub-micron technologies, reducing the electronic devices dimensions under 100nm creates strong advantages, such as increased density of the devices and higher working frequency. Scaling down the structures has some drawbacks. The most important one, concerning the signal amplifiers, is the very small transconductance value when operating the MOS transistor at subthreshold conditions[1]. Increasing the width of the device is not a suitable solution for a higher transconductance because it implies large silicon areas and lower frequency. In this paper a new MOS functional device is presented. This device is SPICE simulated and it has a I<sub>D</sub> ∼ V<sub>GS</sub><sup>3</sup> dependence replacing the classical quadratic I<sub>D</sub> ∼ V<sub>GS</sub><sup>2</sup> solution of the MOS transistor in saturation regime. This new device also introduces a new point of view for the "super- slope" MOS devices concept.
Semiconductor Conference, 2005. CAS 2005 Proceedings. 2005 International; 11/2005
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ABSTRACT: The pseudo-MOS transistor is a dedicated device for in situ electrical characterization of the SOI wafers. In this paper were extracted some parameters for a 200nm Si-film manufactured in SIMOX technique. In this scope, experimental Curves I<sub>D</sub>-V<sub>G</sub>, I<sub>D</sub>-V<sub>D</sub> in inversion and accumulation were used, This work presents an alternative method for the threshold and fiat-band voltages extraction, using the Non-linear Electrical Conduction Theorem.
Microelectronics, 2004. 24th International Conference on; 06/2004
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ABSTRACT: Recently, pressure sensors that combine SOI structures with the properties of piezoelectric layers have been developed. With a SOI-MOSFET used as a transducer element, the sensor can detect pressures just over a threshold value, corresponding to the inversion onset. In this paper, a pseudo-MOS/SOI transistor is the transducer that enhances the work regime: accumulation or inversion for a SOI-MOSFET like regime and depletion for a J-FET like regime. A PZT layer is used for sensing the pressure. New analytical models for the sensor sensitivity in various regimes are presented. ATLAS simulations, based on the concept of "equivalent gate voltage", verify how does the sensor works and provide the current through the transducer. A strongly non-linear characteristic of the sensor results.
Electronics, Circuits and Systems, 2002. 9th International Conference on; 02/2002
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ABSTRACT: The pseudo-MOS/SOI transistor can be a test device or an inherent part of an SOI device controlled by the back gate. Previous models relied on the depletion approximation to compute the potential and electric field distributions. The advantage is computational simplicity; but it can only be applied just for the depletion regime. The exact solutions of the Poisson equations describe the electric field and potential in the pseudo-MOS transistors for all working regimes. The analytical models are compared with ATLAS simulations.
Semiconductor Conference, 2002. CAS 2002 Proceedings. International; 02/2002
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ABSTRACT: This paper is concerned with the investigation of MOSFETs in weak inversion. A new model is proposed for the transistor operating in the saturation zone. In order to validate the model, measurements on several transistors were carried out, which proved good agreement with the experimental model.
Semiconductor Conference, 2002. CAS 2002 Proceedings. International; 02/2002
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ABSTRACT: This paper presents the model for an electromechanical variable capacitor designed as an MOS capacitor with a beam. It studies the influences of the beam on the electrical characteristics of the capacitor.
Microelectronics, 2002. MIEL 2002. 23rd International Conference on; 02/2002
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ABSTRACT: This paper presents a new approach to investigate the limit between the subthreshold and strong inversion regions in the EKV model based on the Nonlinear Electrical Conduction Theorem that involves calculations of the drain-current derivatives. The main advantage is the simultaneous extraction of the threshold voltage, V<sub>T</sub> and of the limit current, I<sub>s</sub>, between subthreshold and strong inversion regions. The proposed method is validated on ultra short channel MOSFET's
Semiconductor Conference, 2001. CAS 2001 Proceedings. International; 11/2001
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ABSTRACT: In the pressure sensors domain, the SOI structures bring some
advantages: electrical insulation, high temperature sensors, an
excellent etch stop layer (buried oxide), compatibility with
microelectronic technology, lowering in thermal noise. The goal of this
paper is to highlight a pressure sensor based on a coupling between
piezoelectric effect in PZT and an Ψ-MOSFET. The analytical models,
that will be presented, stand for a useful tool at a first iteration of
the sensor designing
Semiconductor Conference, 2001. CAS 2001 Proceedings. International; 11/2001
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ABSTRACT: The image force effect is appreciated, especially, for the reverse regime of the rectifier metal-semiconductor contact, causing a weak dependence of the saturation current on the applied voltage. Applying this concept to the forward bias, at high values of currents, the ideality factor has an important increase. Combining this effect with the effect of the series resistance, which is important in the same range of currents, an important depreciation of the rectifier properties is observed
Semiconductor Conference, 2001. CAS 2001 Proceedings. International; 11/2001
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ABSTRACT: This paper reports on the modeling and key design aspects of an
innovative MEMS device: the suspended-gate MOSFET (SG-MOSFET). Based on
the coupled-electromechanical equations describing the suspended gate
actuation, we present the investigation of the pull-in voltages and of
the capacitance switching and tuning ranges for RF applications. A
quasi-analytical model is developed for the gate-to-substrate
capacitance of the SG-MOSFET and then, validated by numerical
simulation. A SPICE macromodel using a polynomial voltage-controlled
source is validated for the DC simulation of the SG-MOSFET. Guide lines
for the low-voltage design of an SG-MOSFET RF switch are detailed
Semiconductor Conference, 2001. CAS 2001 Proceedings. International; 02/2001
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ABSTRACT: This paper presents and studies new developed SPICE models for the
breakdown region of the junction transistor biased in the common-emitter
configuration. In such case, the output electrical characteristic has a
negative slope, especially for very small or negative base
currents
Microelectronics, 2000. Proceedings. 2000 22nd International Conference on; 02/2000
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L. Dobrescu
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ABSTRACT: The Pseudo-MOS transistor can be obtained on all SOI structure, without any lithographic technique. The aim of this paper is to give an accurate model for the volume current of an ψ-MOSFET, when a non-uniform neutral channel between source and drain exists. A possible application is that in the domain of the microsensors in SOI technology, that implies the conduction through neutral channel. The PISCES simulations and analytical models are 2-dimensional. Some experiments on pseudo-MOS transistor manufactured in SIMOX technique are achieved to validate the analytical model
Semiconductor Conference, 2000. CAS 2000 Proceedings. International; 02/2000
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ABSTRACT: The threshold voltage of the MOS transistor is a very important
parameter used in all circuit simulation programs. The aim of this paper
is to compare several largely applied threshold voltage extraction
methods used both for long channel and short channel MOSFETs. This
methods use either the linear operation region or the saturation
operation region of the transistors. The new derivative extraction
method proposed in this paper doesn't depend on the operation region for
long channel devices and gives comparable results for short channel
devices. It is a very simple and accurate extraction method. The
experimental data used in the paper were measured using a HP4155B
system. The mathematical calculation and the threshold voltage
extraction are performed using MATHCAD designed programs
Semiconductor Conference, 2000. CAS 2000 Proceedings. International; 02/2000
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ABSTRACT: The analytical models for electric field and potential
distributions are useful for a lot of SOI devices, like SOI-MOSFET,
SOI-BJT, three-dimensional device, SOI sensors and the others. For
example, they are necessary for establish the inversion or accumulation
conditions for front and back interfaces. The paper refers to a
one-dimensional analysis, both for partially and fully depleted devices
on films with nonuniform doping. The goal of this paper is to obtain an
accurate model for the field and the potential distribution in the SOI
structures with Gaussian doping concentration of impurities in the film.
The results have been used for threshold voltage deduction, but they
represent a reference point in developing of new models for SOI-devices
fabricated on Gaussian profile films. In the fully depleted films case,
the depletion of the silicon substrate for gate voltages that entirely
depleted the film was considered. The results were compared with PISCES
numerical simulations and were in good agreement
Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on; 02/2000
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ABSTRACT: This paper presents an 8 bit digital to analog converter with
logic presetable steps implemented in a 0.8 micron BiCMOS technology.
The circuit design emphasis its simplicity and compactness. The designed
circuit parameters, together with the description and the layout of the
converter and the current source as well as some component blocks are
presented in this paper
Semiconductor Conference, 1999. CAS '99 Proceedings. 1999 International; 02/1999
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ABSTRACT: Nowadays SOI technologies represent a milestone in the fabrication
of devices and integrated systems on thin films. The analytical models
for the threshold voltage are useful for many SOI devices. Our analysis
has focused on partially and fully depleted films, achieved on
insulators like oxide, nitride or oxinitride. This paper gives a simple
and accurate estimation of the threshold voltage. The results were in a
good agreement both with PISCES numerical simulations and with
experimental data
Semiconductor Conference, 1999. CAS '99 Proceedings. 1999 International; 02/1999
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ABSTRACT: This paper presents a computer aided study of the performances
that can be obtained by using the Double Barrier Tunneling (DBRT) diodes
in frequency multiplier applications. The Harmonic-Balance method is
used to analyse the circuits. It is shown that the conversion efficiency
and also the output power versus input power have a hysteresis type
behaviour. The multiplication efficiency which results from the
simulations is compared to the theoretic and previously reported ones.
It is shown that the negative differential resistance region does not
lead to conversion losses diminishing
Semiconductor Conference, 1998. CAS '98 Proceedings. 1998 International; 11/1998
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ABSTRACT: The paper takes into account the experimental dependence of the
differential resistance of the Zener diodes on the current. Considering
logarithmic coordinates, the dependence has a linear form with a slope
less than unity, that invalidates the exponential model-the most
encountered model in Spice. As consequence a new model for the
regulation region of the Zener diode is derived. The new model is
described by a parabolic-law equation
Semiconductor Conference, 1998. CAS '98 Proceedings. 1998 International; 11/1998
