R.F. Wassenaar

Universiteit Twente, Enschede, Overijssel, Netherlands

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Publications (18)8.75 Total impact

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    ABSTRACT: A new measurement setup is presented that allows the observation of 1/f noise spectra in MOSFET's under switched bias conditions in a wide frequency band (10 Hz-100 kHz). When switching between inversion and accumulation, MOSFET's of different manufacturers invariably show reduced 1/f noise power density for frequencies below the switching frequency. At low frequencies (10 Hz), a 5-8 dB reduction in intrinsic 1/f noise power density is found for different devices, largely independent of the switching frequency (up to 1 MHz). The switched bias measurements render detailed wideband 1/f noise spectra of switched MOSFET's, which is useful for 1/f noise model validation and analog circuit design.
    IEEE Electron Device Letters 02/2000; · 2.79 Impact Factor
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    ABSTRACT: A two-stage low-voltage CMOS op amp with rail-to-rail input and output voltage ranges is presented. The circuit uses complementary differential input pairs to achieve the rail-to-rail common-mode input voltage range. The differential pairs operate in strong inversion, and the constant transconductance is obtained by keeping the sum of the square roots of the tail currents constant. Such an input stage has an offset voltage which depends on the common input voltage level, resulting in a poor common-mode rejection ratio. Therefore, special attention has been given to the reduction of the op amp’s systematic offset voltage. Gain-boost amplifiers are connected in a special way to provide not only an increase of the low-frequency open-loop gain, but also to provide a significant reduction of the systematic offset voltage.
    Analog Integrated Circuits and Signal Processing 01/1999; 21(2). · 0.55 Impact Factor
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    ABSTRACT: Due to components nonidealities, the analog reconstruction is the most difficult analog building block in a D/A converter. The paper presents a 16-bit D/A interface with a current driven semidigital filter and reduced number of coefficients. To optimise the number of coefficients an iterative method based on Sinc approximation has been used. With only 25 coefficients we get more than 50dB stopband rejection of noise. A differential solution is proposed to reduce the digital crosstalk and to increase the output swing. The D/A interface has been realised on chip in a 0.8µm CMOS 5V technology. S/N+THD measurements are provided.
    Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European; 10/1998
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    ABSTRACT: In mixed level applications, accurate voltage references are difficult to realise due to the lack of lateral p-n-ps and the large offsets inherent to CMOS opamps. If low power is essential, the accuracy is mainly impaired by the increased offset of the opamps. It is shown that by using chopping techniques, the accuracy of a bandgap voltage reference can be improved by about ten times without laser trimming, with the added benefit of reducing the 1/f noise of the amplifier
    Electronics Letters 06/1998; · 1.04 Impact Factor
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    ABSTRACT: The authors investigate the realisation of a low voltage, large swing tunable transconductor in a 0.5 μm CMOS technology which preserves a constant input window for all tuning conditions. To preserve the DR at low voltages, large swings are required. This conflicts with the voltage limitation imposed by the power supply and distortion figures. This structure overcomes the problems related to non-idealities of the modern MOS transistor in terms of tunability range and linearity. The transconductance can be digitally tuned, in 10 coarse steps, and continuously tuned between coarse steps in the range 30-85 μA/V. The large swing properly yields a large dynamic range over power ratio
    Electronics Letters 05/1998; · 1.04 Impact Factor
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    ABSTRACT: This paper describes the principle and the design of a CMOS low noise, low residual offset, chopped amplifier with a class AB output stage for noise and offset reduction in mixed analog digital applications. The operation is based on chopping and dynamic element matching to reduce noise and offset, without excessive increase of the charge injection residual offset. The main goal is to achieve low residual offsets by chopping at high frequencies reducing at the same time the 1/f noise of the amplifier. Measurements on a 0.8 μm CMOS realization show reduction of 1/f noise and 18nV/√Hz residual thermal noise at low frequencies. The residual offset is lower than 100 μV up to 8 MHz chopping frequency. Driving a 32 Ω load the linearity is better than -80 dB and better than -88 dB for a 1 kΩ load at 1 kHz
    Electronics, Circuits and Systems, 1998 IEEE International Conference on; 02/1998
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    ABSTRACT: This paper describes the principle and the design of a 0.5¯m CMOS, low-power, lowvoltage, chopped amplifier for noise and offset reduction in mixed analogue digital applications. The operation is based on chopping and dynamic element matching to reduce noise and offset, without excessive increase of the charge injection residual offset. It consists of a chopped transconductance stage and a new class AB stage capable of working at 1.3V supply voltage. The main goal is to achieve low residual offsets by chopping at high frequencies reducing at the same time the 1/f noise of the amplifier. Loaded with a heavy load 32Omega jj 300pF it has a 91dB open loop gain and a GBW of 1.8MHz. Simulations show a THD of-90dB for a 1kOmega load and-83dB for a 32Omega load and 1KHz input signal. The simulated static offset is 1.67mV. The simulated residual offset is 450¯V at 10MHz chopping. At 1KHz chopping, the offset becomes lower than 1¯V. I. Introduction In a CMOS technology for mixed signal appl...
    01/1998;
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    Peter M. Stroet, Paul T. M. Van Zeijl, Roelof F. Wassenaar
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    ABSTRACT: In this paper an eight-order continuoustime Butterworth band-pass filter with quality factor of 10 is presented, intended to be used for selectivity in modern DECT handset receivers. A distortion analysis is performed and a model to describe the frequency dependent Spurious-Free Dynamic-Range (SFDR) in absolute value is presented. Measurements show a SFDR of 48 dB with a 3 mW power consumption. I. Introduction Until now, Surface-Acoustic-Wave (SAW) filters are frequently used in DECT handset receivers for selectivity. However, they have some disadvantages: the relatively large package, the fixed input-output impedance, the insertion loss and the high cost. The aim of the filter to be presented is to beat these disadvantages by integrating selectivity along with other radio circuits. These radio circuits are already realized in a high-frequency bipolar process, and therefore, the integrated filter must be bipolar too. Digital filters require A/D-converters with a considerable power con...
    01/1998;
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    P.M. Stroet, P.T.M. van zeijl, R.F. Wassenaar
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    ABSTRACT: In this paper an eight-order continuous-time Butterworth band-pass filter with quality factor of 10 is presented, intended to be used for selectivity in modern DECT handset receivers. A distortion analysis is performed and a model to describe the frequency dependent Spurious-Free Dynamic-Range (SFDR) in absolute value is presented. Measurements show a SFDR of 48 dB with a 3 mW power consumption.
    Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European; 10/1997
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    ABSTRACT: A low voltage CMOS op amp is presented. The circuit uses complementary input pairs to achieve a rail-to-rail common mode input voltage range. Special attention has been given to the reduction of the op amp's systematic offset voltage. Gain boost amplifiers are connected in a special way to provide not only an increase of the low-frequency open-loop gain but also a significant reduction of the systematic offset voltage
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on; 06/1996
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    P.P. Vervoort, R.F. Wassenaar
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    ABSTRACT: A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion, while the third changes the bias currents of the first two in response to changes in the input common-mode level. The resulting circuit has a large signal transconductance which is constant to within 3% over the entire common-mode input range. It can operate from a single supply voltage of 2.2 volts
    Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on; 01/1995
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    ABSTRACT: In this paper an input stage and an output stage are presented for application in low-voltage CMOS operational amplifiers. The input stage operates in strong inversion and has a rail-to-rail common-mode input voltage range. The transconductance (g m ) is insensitive to the common-mode input voltage. The class AB output stage has a rail-to-rail output range. A class AB control circuit prevents any transistors in the output stage from switching off. This improves the large-signal high-frequency behavior and the step response of the amplifier. A complete two-stage Op Amp employing the proposed input and output stages was realized in a semi-custom CMOS process with minimum channel lengths of 10m and transistor threshold voltages of approximately 0.7 V. The measured minimum supply voltage is 2.5 V. The measured input voltage range exceeds the supply rails and the output voltage reaches both rails within 130 mV. The unity-gain bandwidth of the complete Op Amp is severely limited by the long channel lengths. Simulations show that a unity-gain bandwidth of 7 MHz is feasible if 2.5m channel lengths are used.
    Analog Integrated Circuits and Signal Processing 08/1994; 6(2):121-133. · 0.55 Impact Factor
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    ABSTRACT: Two 3.3-V operational amplifiers with constant-g m rail-to-rail input stage and rail-to-rail output stage are presented. The constant transconductance (g m ) ensures a constant unity-gain frequency within the whole commonmode input range. Two new methods to control theg m are introduced. Both operational amplifiers use the same rail-to-rail output stage. The operational amplifiers have been integrated in a CMOS semicustom process with transistor lengths of 10m. The common-mode input voltage swing extends beyond the positive supply rail by 400 mV and beyond the negative supply rail by 200 mV. The output voltage is able to reach within 130 mV of the supply rails. The output current of the operational amplifiers is 2 mA and the voltage gain is 85 dB. The unity-gain frquency is 165 kHz, which is mainly limited by the relatively long transistor lengths of 10m. In another process with channel lengths of 2m, simulation results showed that a unity-gain frequency of 4 MHz can easily be obtained.
    Analog Integrated Circuits and Signal Processing 02/1994; 5(2):135-146. · 0.55 Impact Factor
  • J.H. Botma, R.F. Wassenaar, R.J. Wiegerink
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    ABSTRACT: A CMOS input stage for operational amplifiers is presented. To obtain a rail-to-rail input range an nMOS and a pMOS differential pair are driven in parallel. Both differential pairs operate in weak inversion. With the help of only four additional transistors a transconductance g<sub>m</sub> is obtained which is independent of the common input voltage. This extension does not increase the minimum required supply voltage.
    Electronics Letters 07/1993; · 1.04 Impact Factor
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    J.H. Botma, R.F. Wassenaar, R.J. Wiegerink
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    ABSTRACT: A low-voltage two-stage operational amplifier (op-amp) is presented. The op-amp features rail-to-rail operation and has an input stage with a constant transconductance (g<sub>m</sub>) over the entire common-mode input range. The input stage consists of an n- and a p-MOS differential pair connected in parallel. The constant g<sub>m</sub> is accomplished by regulating the tail-currents with the aid of an MOS translinear (MTL) circuit. The resulting g<sub>m</sub> is constant within 5%. The common-source output stage employs a feedback circuit which also contains an MTL circuit. This feedback circuit ensures class AB operation and prevents the transistors in the output stage from cutting off. The op-amp isi realized in a semi-custom CMOS process with minimum channel lengths of 10μm. Simulations show that the minimum supply voltage is less than 2.5 V. A unity gain bandwidth of 550 kHz and a DC voltage gain larger than 80 dB are feasible. The input range exceeds the supply rails, whereas the output range reaches the rails within 130 mV
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on; 06/1993
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    R.F. Wassenaar
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    ABSTRACT: The minimum-maximum (minimax) circuit selects the minimum and maximum of two input currents. Four transistors in matched pairs are operated in the saturation region. Because the behavior of the circuit is based on matched devices and is independent of the relationship between the drain current and the gate-source voltage, transistor pairs may operate in strong, moderate and weak inversion. Therefore, the circuit can also be implemented in bipolar as well as MOS technology. The circuit has many useful applications in modern signal processing
    IEEE Circuits and Devices Magazine 12/1992; · 1.18 Impact Factor
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    ABSTRACT: Two 3-V CMOS low-voltage operational amplifiers (op-amps) with constant transconductance ( g <sub>m</sub>) rail-to-rail input stages are presented. The constant g <sub>m</sub> ensures a constant unity-gain frequency within the whole common-mode input range. Two new methods to control the g <sub>m</sub> of the input stage are introduced. The op-amps contain the same class-AB output stage with rail-to-rail output swing. The common-mode input voltage swing extends the positive supply rail by 600 mV and the negative supply rail by 200 mV. The output voltage can reach the supply rails within 130 mV. The output current of the op-amps was limited to ±2 mA, voltage gain was 85 dB, and the unity-gain frequency was 165 kHz. The op-amps were integrated in a semicustom CMOS process with transistor lengths of 10 μm
    Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on; 06/1992
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    ABSTRACT: This paper describes the principle and the design of a CMOS low, noise, low, residual offset, chopee-d, amplifier with a class AB output stage for noise and, offset reduction in mixed analog digital, applications.. The operation is based on chopping. and dynamic element matching to reduce noise and offset,2 withput excessive increase of: the charge injFction residual, offset. The main goal is to, achieve low residual offsets by chopping at high, fre-quencies reducing at the same time the l/f noise ofi the a-mplifier. Measurements on a 0.8pm CMOS realization, show reduction of l/f noise and 18nVIdHz residual thermal npise at low fqequencies, The residual offset is losyer than 100kV up>to 8MHz c-hopping frequency. Driving, a 329, load the line-a-rity is better than -8OdB and better.than -88dB,for a lkQ,load,at 1KHz.