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ABSTRACT: This paper presents an improved asymmetric space vector modulation (ASVM) for two-level voltage source converters (VSCs) when the switching frequency is as low as nine times of line frequency. By adding two pulses in each line cycle when the fundamental voltage crosses zero, the total harmonic distortion (THD) of output current can be reduced significantly. The penalty of additional switching loss is very limited for high power factor operation. The applications of the improved ASVM in a single VSC or in two interleaved VSCs are shown, respectively. With the optimization of the duration and position of the additional pulses, the ac current THD can be reduced to as low as 50% for single VSC and even lower to less than 25% for interleaved VSCs systems. Such THD reduction has close relationship with space vectors' position, modulation index, and interleaving angle. Improved ASVM can also reduce the amplitude of circulating current in the interleaved VSCs, leading to smaller interphase inductors. Finally, the weights of total inductors needed to meet the same THD requirement are compared to demonstrate the benefits of improved ASVM when different pulsewidth modulation schemes are used. The analysis results are verified by experiments on a demo system.
IEEE Transactions on Power Electronics 04/2012; · 4.65 Impact Factor
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ABSTRACT: This paper presents an improved asymmetric space vector modulation (ASVM) for two level voltage source converters (VSCs) when the switching frequency is only 9 times of line frequency. By adding two pulses in each line cycle when the fundamental voltage crosses zero, the total harmonic distortion (THD) of output current can be reduced significantly with very limited penalty. The applications of improved ASVM in a single VSC or two interleaved VSCs systems are shown separately. With optimization, the ac current THD can be reduced to as low as 50% for single VSC and even lower to 20% for interleaved VSCs systems. Such THD reduction has close relationship with modulation index and interleaving angle. In addition, improved ASVM can also reduce the amplitude of circulating current which mainly determined the size of inter-phase inductors. Finally, the weights of total inductors needed to meet the same THD requirement are compared to demonstrate the benefits of improved ASVM when different PWM schemes are used. The analysis results are verified by experiments on a demo system.
Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE; 03/2010
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ABSTRACT: This paper presented a systematic analysis of the protection methods for paralleled VSCs system especially with common DC bus from four types of internal faults, including short or open circuit faults of single switch or diode. The potential damages of such faults relating to circulating current were first explained. After that internal faults detection and isolation schemes based on de-saturation and circulating currents were shown in detail. The study confirmed that if the system can be shut down for a short period, SCRs can be used to recovery the system from internal faults with one redundant VSC. Otherwise, the topology with isolated DC buses for each VSC or other fast DC current breakers should be used. Finally, experimental results using a 2+1 VSCs system validated the analysis and protection schemes.
Applied Power Electronics Conference and Exposition, 2009. APEC 2009. Twenty-Fourth Annual IEEE; 03/2009
