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ABSTRACT: We demonstrate endurance characteristics of a 1T1C, 64 Mb FRAM in a real-time operational situation. To explore endurance properties in address access time t<sub>AA</sub> of 100 ns, we establish a measurement set-up that covers asymmetric pulse-chains corresponding to D1- and D0-READ/RESTORE/WRITE over a frequency range from 1.0 to 7.7 MHz. What has been achieved is that endurance cycles approximate 5.9 times 10<sup>24</sup> of cycle times in an operational condition of V<sub>DD</sub> = 2.0 V and 85degC in the developed 64 Mb FRAM. Donor concentration due to build-up of oxygen vacancy in a ferroelectric film has also been evaluated to 2.3 times 10<sup>20</sup> cm<sup>-3</sup> from I-V-t measurements.
VLSI Technology, 2008 Symposium on; 07/2008