Chee Wee Liu

National Taiwan University, T’ai-pei, Taipei, Taiwan

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Publications (34)64.27 Total impact

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    ABSTRACT: Raman spectra of three bulk 4H-SiC wafers with different free carrier concentration were measured at temperature from 80 K to 873 K. As temperature increases, Raman peaks of most optical phonon modes show monotonous down shift. An anomalous non-monotonous variation with temperature, was observed in the A<sub>1</sub> longitudinal optical (LO) mode from doped samples. Two methods of theoretical fitting, one-mode (LO-plasma coupled (LOPC) mode) and two-mode (A<sub>1</sub>(LO) + LOPC) fitting, are employed to analyze this anomalous phenomenon. Theoretical simulations for temperature dependent Raman spectra by using two methods are critically examined. It turns out that one-mode method conforms well the experimental results, while two-mode method is untenable in physics. The non-monotonous variation of blue-red shifts with temperature for LOPC mode from doped 4H-SiC could be explained by the influence from ionization process of impurities on the process of Raman scattering. A quantitative description on temperature dependent Raman spectra for doped 4H-SiC is achieved, which matches well to experimental data.
    Optics Express 11/2013; 21(22):26475-82. · 3.53 Impact Factor
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    ABSTRACT: High-energy extremely ultraviolet (EUV)-induced Ge MOSFETs degradation is investigated. The degradation of threshold voltage, subthreshold swing (SS), and channel mobility is attributed to the generation of interface traps and oxide fixed charges. Much more severe degradation of SS and VT on n-FETs compared to p-FETs suggests that more interface defects in the upper half of Ge bandgap are generated by EUV radiation than in the lower half bandgap. The increase of interface trap is responsible for the mobility degradation of n-FETs due to Coulomb scattering.
    IEEE Electron Device Letters 10/2013; 34(10):1220-1222. · 3.02 Impact Factor
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    ABSTRACT: Dislocation stressors in the source and drain build the tensile stress field in the channel of nMOSFET. An analytic model of the strain/stress field induced by the edge dislocation is presented. The model is used for stress optimization of the dislocation stressors in the nMOSFET channel. The accuracy of the model is similar to that of the finite element simulation. The closed-form solution provides a physical insight into the dislocation stressor. The analytic solution shows that shallower dislocations generate a larger tensile stress at the edge of the channel near the virtual source. For a given dislocation depth, an optimal distance of the dislocation core from the edge is required to generate the maximum tensile stress at the channel edge.
    IEEE Electron Device Letters 08/2013; 34(8):948 - 950. · 3.02 Impact Factor
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    ABSTRACT: We report the structural and electrical characteristics of hafnium oxide (HfO2) gate dielectrics treated by remote NH3 plasma under various radio-frequency (RF) powers at a low temperature. Significant increase of effective dielectric constant (keff), decrease of capacitance equivalent thickness (CET), reduction in leakage current density, and suppression of the interfacial layer thickness were observed with the increase of the RF power in the remote NH3 plasma treatment. The effects of hydrogen passivation and depassivation on the HfO2/Si interface due to the remote NH3 plasma treatment were also observed by the variation of photoluminescence (PL) intensity, indicating that the PL measurement is applicable to probe the interfacial properties. An ultrathin interfacial layer (∼0.3 nm), a high keff, (20.9), a low leakage current density (9 × 10−6 A/cm2), and a low CET (1.9 nm) in the nitrided HfO2 film were achieved, demonstrating that the nitridation process using remote NH3 plasma under a high RF power at a low temperature is a promising way to improve in electrical properties of high-K gate dielectrics.
    Applied Surface Science 02/2013; 266:89–93. · 2.54 Impact Factor
  • TELKOMNIKA Indonesian Journal of Electrical Engineering. 02/2013; 11(2).
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    ABSTRACT: We have reported room temperature infrared reflectance and transmission measurements at near normal incidence in the frequency range of 200–6500 cm−1 to characterize 3C-SiC epitaxial layers grown on (1 0 0) Si by CVD in a vertical reactor configuration by using different Si/C ratios and growth time ranging from 2 min to 4 h. The effects of surface roughness and 'conducting interfacial' transition layer are meticulously included in the effective medium theory for simulating the infrared spectra to explicate observed damping of interference fringe contrasts with increasing frequencies. In a few epitaxially grown samples we have adopted Bruggeman's two-component model to elucidate atypical divots seen within the reststrahlen band by assuming the coexistence of crystalline and intergranular grains forming heterogeneous 3C-SiC. The estimated values of surface roughness and conducting transition layer are correlated very well with the existing data from optical interference and scanning probe microscopy.
    Semiconductor Science and Technology 10/2012; 27(11):115019. · 2.21 Impact Factor
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    ABSTRACT: Synchrotron radiation X-ray absorption and UV 325 nm excitation Raman scattering- photoluminescence (PL) have been employed to investigate a series of 4H-SiC wafers, including bulk, epitaxial single or multiple layer structures by chemical vapor deposition. Significant results on the atomic bonding and PL-Raman properties are obtained from these comparative studies.
    Materials Science Forum 05/2012; 717-720:509-512.
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    ABSTRACT: The effects of mechanical stress on the dc and high-frequency performances of laterally diffused MOS (LDMOS) transistors with different layout structures were investigated by using the wafer bending method. A 3.1% peak cutoff frequency $(f_{T})$ enhancement is achieved for the multifinger device under 0.051% biaxial tensile strain. For LDMOS with annular layout, the $f_{T}$ enhancement is increased to 3.7% due to the various channel directions. Our results suggest the strain technology can be adopted in LDMOS for RF applications. The transconductance and gate capacitance were also extracted to clearly demonstrate the $f_{T}$ variations.
    IEEE Electron Device Letters 04/2012; 33(4):471-473. · 3.02 Impact Factor
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    ABSTRACT: The thermoelastic strains are induced by through silicon vias due to the difference of thermal expansion coefficients between the copper $(\sim\!\!\hbox{18}\ \hbox{ppm}/^{\circ} \hbox{C})$ and silicon $(\sim\!\!\hbox{2.8}\ \hbox{ppm}/^{\circ} \hbox{C})$ when the structures are exposed to a thermal ramp in the process flow. A compact analytic model (Bessel function) of the strain field is obtained using Kane–Mindlin theory, and has a good agreement with the finite-element simulations. The elastic strains in the silicon in the radial direction and angular direction are tensile and compressive, respectively. The linear superposition of the analytic model of a single via can be used in the multi-via configuration. Due to the interaction of vias, the slightly larger errors of strain occur between the two close vias when the linear superposition is used.
    IEEE Transactions on Electron Devices 03/2012; 59(3):777-782. · 2.36 Impact Factor
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    ABSTRACT: The conventional continuous scan and Delay- ID , lin methods of negative bias temperature instability characterization are not applicable for polycrystalline silicon thin-film transistors due to significant recovery effect and mobility degradation, respectively. An improved on-the-fly (OTF) method is proposed to simultaneously extract the threshold voltage shift and mobility degradation. In addition, the improved OTF method is more accurate than the continuous scan due to less recovery effect. The exponents of reaction-diffusion mechanism can be clearly determined using the new method.
    IEEE Transactions on Electron Devices 12/2010; · 2.36 Impact Factor
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    ABSTRACT: Short-channel controllability by insulating halo (IH) is investigated using the NFET strained-Si technology. By embedding SiO<sub>2</sub>/Si<sub>3</sub>N<sub>4</sub> insulators in the halo regions, the increase of halo implant concentration reduces source/drain depths and improves short-channel effects such as drain-induced barrier lowering. With I<sub>off</sub> similar to the control device at the same gate length by adjusting the threshold voltage, the channel doping can be reduced, and the channel mobility increases due to the decrease of vertical electric field. Moreover, IHs reduce the shallow trench isolation compressive stress in the channel and yield a high-electron mobility enhancement. The device performance is optimized based on the simulation design. Up to a 23% I<sub>on</sub> improvement was experimentally achieved by optimal IH insertion. A 7% lower junction capacitance and an 8% ring oscillator speed improvement are demonstrated when the IH is adopted in the NFET alone. Moreover, device reliability is carefully examined and is not adversely impacted by IH insertion.
    IEEE Transactions on Electron Devices 11/2010; · 2.36 Impact Factor
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    ABSTRACT: Single-crystalline Ge p-channel thin-film transistors with Schottky-barrier source/drain (S/D) on flexible polyimide substrates are fabricated by a simple low-temperature process ( ?? 250??C), which preserves the high mobility of Ge channel. Adhesive wafer bonding and Smart-Cut techniques were utilized to transfer the single-crystalline Ge thin film onto polyimide substrates. The Schottky-barrier S/D is formed by using Pt/n-Ge contact, showing a low hole barrier height. The device has a linear hole mobility of ~ 170 cm<sup>2</sup>??V<sup>-1</sup>??s<sup>-1</sup> and a saturation current of ~ 1.6 ??A/??m at V<sub>d</sub> = - 1.5 V for the channel length and width of 15 and 280 ??m, respectively.
    IEEE Electron Device Letters 06/2010; · 3.02 Impact Factor
  • Source
    Chu-Hsuan Lin, Chee Wee Liu
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    ABSTRACT: The major radiation of the sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III-V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows.
    Sensors 01/2010; 10(10):8797-826. · 2.05 Impact Factor
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    ABSTRACT: The dependence of the performance of strained NMOSFETs on channel width was investigated. When the channel width was varied, the stress in the channel varied accordingly. This changed the electron effective mass and, consequently, the on-state current I <sub>on</sub>. By shrinking the channel width of a strained NMOSFET from 1 to 0.1 mum and by keeping the channel length at 55 nm, the on-state drain current per unit channel width was enhanced by 22%. The gate leakage current was also affected by the stress in the channel, which can be explained by the increase in hole barrier height at the Si/SiO<sub>2</sub> interface. Furthermore, when the film stress was increased by 1 GPa, the gate leakage current density Jg of a strained NMOSFET with a channel width of 0.1 mum and a length of 55 nm under a negative bias -3 V was reduced by 63%.
    IEEE Transactions on Electron Devices 12/2009; · 2.36 Impact Factor
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    ABSTRACT: The flatband-voltage shift of metal-oxide-silicon capacitors is investigated under the application of low-level stress (up to 220 MPa of biaxial stress and 380 MPa of uniaxial stress) to different substrate orientations. We propose that the flatband-voltage shift be modeled as the net effect of silicon-band-edge shifts and modulation of the separation between the band edge and the Fermi level under low levels of applied mechanical strain. For the (001) n-type substrate, a negative flatband-voltage shift is observed due mainly to the downward shift of the conduction-band edge, while a positive flatband-voltage shift is observed for the (001) p-type substrate due to the upward shift of the valence-band edge. For the uniaxial tensile strain on n-substrate capacitors for (110) and (111) substrates, the modulation of band-edge and Fermi-level separation by the conduction-band density of states exceeds the downward shift of the conduction band, which induces a positive flatband shift that is distinct from that observed in the (001) n-substrate. The shift of the band edges is determined by the proposed model and compared with theoretical calculations.
    IEEE Transactions on Electron Devices 09/2009; · 2.36 Impact Factor
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    ABSTRACT: The dynamic stress switching of p-channel polycrystalline-silicon (poly-Si) thin-film transistors from full depletion to accumulation bias creates the high electric field near source/drain (S/D) junctions due to the slow formation of the accumulated electrons at the SiO<sub>2</sub>/poly -Si interface. The high electric field causes impact ionization near the S/D, where the secondary electrons surmount the SiO<sub>2</sub> barrier and are trapped near the interface. The channel region near the S/D is inverted to p-type by the trapped electrons, and the effective channel length is reduced. The drain current increases with the stress time, particularly for short-channel devices.
    IEEE Electron Device Letters 05/2009; · 3.02 Impact Factor
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    ABSTRACT: Positive bias temperature instability in p-channel polycrystalline silicon thin-film transistors is investigated. The stress-induced hump in the subthreshold region is observed and is attributed to the edge transistor along the channel width direction. The electric field at the corner is higher than that at the channel due to thinner gate insulator and larger electric flux density at the corner. The current of edge transistor is independent of the channel width. The electron trapping in the gate insulator via the Fowler-Nordheim tunneling yields the positive voltage shift. As compared to the channel transistor, more trapped electrons at the edge lead to more positive voltage shift and create the hump. The hump is less significant at high temperature due to the thermal excitation of trapped elections via the Frenkel-Poole emission.
    IEEE Electron Device Letters 01/2009; · 3.02 Impact Factor
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    ABSTRACT: The impact ionization that occurred near channel-S/D junctions is responsible for the dynamic bias temperature instability (BTI) of p-channel poly-Si thin-film transistors (TFTs). Impact ionization is induced by lateral electric field when gate voltage switches from inversion or full-depletion to accumulation bias. Drain current increases initially due to shortened effective channel length. As the stress time increases, the grain barrier height increases to reduce the drain current, especially at high temperature. In addition to the transient switches, the plateau portions of the gate pulse have significant impact on the device degradation for large stress amplitudes.
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    ABSTRACT: The tunneling current of Pt/oxide/n-6H-SiC tunneling diodes was used for electroluminescence (EL). The negative gate bias can inject electrons from Pt to n-SiC and leads to a radiative donor-acceptor pair (DAP) transition. The blue EL at room temperature is observed at negative gate bias, and the intensity increases with increasing drive current. The DAP transition is enhanced by the electric field due to carrier tunneling. Thus, strong luminescence is observed at negative (inversion) bias, while no luminescence is observed at positive (accumulation) bias.
    IEEE Transactions on Electron Devices 01/2009; · 2.36 Impact Factor
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    ABSTRACT: Nickel germanides formed on crystalline n-Ge (110) substrate are investigated. By the XRD analysis, Ni5Ge3, NiGe, and Ni2Ge phases are formed sequentially with the increasing annealing temperatures from 300oC to 600oC on n-Ge (110) substrate. NiGe, however, is the only phase observed on (100) substrate at corresponded annealing temperatures. On the other hand, there shows a strong tensile stress in the underlying Ge (110) substrate. The tensile strain may be due to the lattice mismatch between nickel germanides and Ge substrate.
    ECS Transactions 10/2008; 16(10).

Publication Stats

112 Citations
64.27 Total Impact Points


  • 2001–2013
    • National Taiwan University
      • • Department of Electrical Engineering
      • • Center for Emerging Material and Advanced Devices
      • • Graduate Institute of Electronics Engineering
      T’ai-pei, Taipei, Taiwan
  • 2010
    • National Dong Hwa University
      Hua-lien, Taiwan, Taiwan
  • 2004
    • National Central University
      • Department of Electrical Engineering
      Taoyuan City, Taiwan, Taiwan