I. Adin

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Publications (2)1.85 Total impact

  • Article: A 16-kV HBM RF ESD Protection Codesign for a 1-mW CMOS Direct Conversion Receiver Operating in the 2.4-GHz ISM Band
    J.L. Gonzalez, H. Solar, I. Adin, D. Mateo, R. Berenguer
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    ABSTRACT: A decreasing-sized π -model electrostatic discharge (ESD) protection structure is presented and applied to protect against ESD stresses at the RF input pad of an ultra-low power CMOS front-end operating in the 2.4-GHz industrial-scientific-medical band. The proposed ESD protection structure is composed of a pair of ESD devices located near the RF pad, another pair close to the core circuit, and a high-quality integrated inductor connecting these two pairs. This structure can sustain a human body-model ESD level higher than 16 kV and a machine-model ESD level higher than 1 kV without degrading the RF performance of the front-end. A combined on-wafer transmission line pulse and RF test methodology for RF circuits is also presented confirming previous results. The front-end implements a zero-IF receiver. It has been implemented in a standard 2P6M 0.18-μm CMOS process. It exhibits a voltage gain of 24 dB and a single-sideband noise figure of 8.4 dB, which make it suitable for most of the 2.4-GHz wireless short-range communication transceivers. The power consumption is only 1.06 mW from a 1.2-V voltage supply.
    IEEE Transactions on Microwave Theory and Techniques 10/2011; · 1.85 Impact Factor
  • Conference Proceeding: A Fully Integrated 26.5 dBm CMOS Power Amplifier for IEEE 802.11a WLAN Standard with on-chip power inductors
    H. Solar, R. Berenguer, I. Adin, U. Alvarado, I. Cendoya
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    ABSTRACT: A fully integrated power amplifier (PA) for 5 GHz 802.11a standard is implemented using a 0.18 mum CMOS process. In this paper we present the new concept of "power inductors". These on-chip inductors are implemented on the transistor drains and the output network and they can withstand the high level current signals that go through them while presenting low DC-resistance and high Q characteristics. The two stage differential power amplifier is fully integrated including the input and output networks. Measurement results show that the power amplifier achieves a power gain of 25.5 dB, 1 dB compression point (P<sub>1dB</sub>) of 20.8 dBm and power added efficiency of 26.7 %. The saturated output power is 26.5 dBm, achieving the highest reported output power among CMOS PAs for 5-GHz WLAN applications
    Microwave Symposium Digest, 2006. IEEE MTT-S International; 07/2006
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