ABSTRACT: The Stud Bump Bonding (SBB) flip chip technology on Molded Interconnect Devices (MID) is a highly promising solution to the increasing demand for reliable interconnection technology at high temperatures, a miniaturized assembly and a reduction of costs and parts. The reliability and potential failure mechanism of the flip chip technology on organic boards, such as FR4, invoking the solder bump technology is widely studies, whereas the failure mechanism and therefore the criteria to optimize a SBB flip chip interconnection on MID is still largely unknown. In that work, an overview of potential failure mechanisms of SBB flip chip interconnections are presented and checked for relevance. This follows a detailed FE based stress analysis of the underfill fillet and the identification of critical locations. Two failure criteria based on physics-of-failure approach are chosen to describe the impact of design parameters and material properties of the flip chip interconnection. In order to verify the proposed failure criteria, flip chip interconnections on MID substrate are assembled. Two different SBB technologies are utilized. Moreover, different board thicknesses are used. Additional, the influence of surface treatment of the LCP substrate on the reliability of the flip chip interconnections are investigated. The assembled interconnections are exposed to thermal cycling (150°C/-40°C) for 3000 cycles and checked for failure by Scanning Acoustic Microscopy (SAM), electrical resistance of the bumps as well as optical investigation of the fillet. The detected failures from experiment are afterwards correlated with the theoretical proposed failure mechanisms. Based on the correlation, a design guideline for increasing the reliability of SBB flip chip interconnection on MID substrates is established.
Electronic System-Integration Technology Conference (ESTC), 2010 3rd; 10/2010