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ABSTRACT: In this study, non-volatile memory effect was characterized using the single-transistor-based memory devices based on self-assembled gold nanoparticles (AuNP) as the charge trapping elements and atomic-layer deposited ZnO as the channel layer. The fabricated memory devices showed controllable and reliable threshold voltage shifts according to the program/erase operations that resulted from the charging/discharging of charge carriers in the charge trapping elements. Reliable non-volatile memory properties were also confirmed by the endurance and data retention measurements. The low temperature processes of the key device elements, i.e., AuNP charge trapping layer and ZnO channel layer, enable the use of this device structure to the transparent/flexible non-volatile memory applications in the near future.
Journal of Nanoscience and Nanotechnology 02/2012; 12(2):1344-7. · 1.56 Impact Factor
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ABSTRACT: In this letter, InGaZnO thin-film transistor (bottom-gate (n+ Si) and top-contact structure)-based nanofloating gate memory devices were developed. These nonvolatile transistor memory devices contained self-assembled gold nanoparticles (Au<sub>NP</sub>) and exhibited good programmable memory characteristics according to the programming/erasing operations with large memory windows. The charge trapping in the Au<sub>NP</sub> charge storage layers was responsible for the memory operations. The good endurance and data retention capability demonstrated by these memory devices make them suitable for nonvolatile memory applications. As this approach was based on the solution-processed controlled Au<sub>NP</sub> charge trapping layers and the low-temperature synthesized transparent oxide semiconductors, it has the potential for application in low-temperature-processed transparent nonvolatile memory devices.
IEEE Electron Device Letters 11/2010; · 2.85 Impact Factor
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ABSTRACT: Organic nanofloating gate memory devices were developed based on ink-jet printed 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene thin-film transistors (TFTs) embedding gold nanoparticles. The programming/erasing operations showed that the organic memory devices exhibited good programmable memory characteristics that resulted in a gate-voltage controlled reliable threshold voltage shift of the programmed/erased states. The data retention and endurance measurements also showed the reliable nonvolatile memory properties. Solution processes were used for synthesis of the charge trapping elements and TIPS-pentacene TFTs were made by the ink-jet printing technique at low temperatures. Therefore, these processes can readily be adopted in all-printed organic memory devices on flexible substrates.
Applied Physics Letters 05/2010; 96(21):213107-213107-3. · 3.84 Impact Factor
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ABSTRACT: Controlled gold nanoparticle ( Au <sub> NP </sub>) -based nonvolatile memory devices were developed based on pentacene organic transistors and polymethylmethacrylate (PMMA) insulator layers. The memory device had the following configuration: n + Si gate / SiO <sub>2</sub> blocking oxide/polyelectrolytes/ Au <sub> NP </sub>/ PMMA tunneling dielectric layer/Au source-drain. According to the programming/erasing operations, the memory device showed good programmable memory characteristics with a large memory window. In addition, good reliability was confirmed by the data retention characteristics. The fabrication procedures for the charge trapping and tunneling layers were based on simple solution processes (by dipping and spin-coating) and the maximum processing temperature was ≪100 ° C , so this method has potential applications in plastic/flexible electronics.
Applied Physics Letters 02/2010; · 3.84 Impact Factor
