Publications (3)5.14 Total impact
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Article: Characterization and Modeling of 1/ Noise in Si-nanowire FETs: Effects of Cylindrical Geometry and Different Processing of Oxides
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ABSTRACT: In this paper, the volume trap densities Nt are extracted from gate-all-around silicone-nanowire FETs with different gate oxides, using a cylindrical-coordinate-based flicker noise model developed. For extracting Nt , the drain-current power spectral densities were measured from a large number of identical devices and averaged over, thereby mimicking the spatial distribution of trap sites inducing 1/ f curve. Also, effective mobility and threshold voltage were simultaneously extracted with the series resistance to characterize the 1/ f noise in terms of intrinsic values of these two channel parameters. The volume trap densities thus extracted from different oxides (in situ steam-generated oxide/rapid thermal oxide/nitride-gated oxide) are compared and further examined using hot-carrier stress data. Finally, radius dependence of the cylindrical 1/ f model developed is discussed.IEEE Transactions on Nanotechnology 06/2011; · 2.29 Impact Factor -
Article: – Characteristics in Undoped Gate-All-Around Nanowire FET Array
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ABSTRACT: Presented in this letter are the C - V data, measured from nanowire capacitors, which have been fabricated by connecting in parallel a large number of identically processed nanowire FETs. The C - V curves were examined over a range from accumulation to inversion with varying frequencies and at different electrode configurations. The gate response of the undoped and floating channel is investigated using C - V data, and the inversion charge and carrier mobility are accurately extracted by eliminating the effects of parasitic capacitances and series resistance R <sub>sd</sub>. These observed data are compared with the data from planar MOS capacitor.IEEE Electron Device Letters 03/2011; · 2.85 Impact Factor -
Conference Proceeding: Characterization of Gate-All-Around Si-NWFET, including Rsd, cylindrical coordinate based 1/f noise and hot carrier effects
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ABSTRACT: In this paper, we introduce the cylindrical coordinate based flicker noise model for Silicon NanoWire Field Effect Transistor (Si-NWFET) with Gate-All-Around (GAA) structure. For the accurate extraction of the volume trap density, N<sub>t</sub>, with 1/f noise modeling, the parameters which represent the intrinsic channel properties are determined by rejecting the series resistance R<sub>sd</sub> effect. Due to the random distribution of traps in Si-NWFETs, the 1/f noise data are obtained by averaging the drain current power spectral density, S<sub>id</sub>, for several devices. By using the proposed 1/f model, the extracted volume trap density is compared for three different oxide processes (ISSG/RTO/GNOx) and verified by hot carrier stress test.Reliability Physics Symposium (IRPS), 2010 IEEE International; 06/2010
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Institutions
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2010–2011
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Pohang University of Science and Technology
- Department of Electronic & Electrical Engineering
Andong, North Gyeongsang, South Korea
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