Publications (2)3.23 Total impact
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Article: An Inductor-Less Noise-Cancelling Broadband Low Noise Amplifier With Composite Transistor Pair in 90 nm CMOS Technology
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ABSTRACT: A new broadband low-noise amplifier (LNA) is proposed in this paper. The LNA utilizes a composite NMOS/PMOS cross-coupled transistor pair to increase the amplification while reducing the noise figure. The introduced approach provides partial cancellation of noise generated by the input transistors, hence, lowering the overall noise figure. Theory, simulation and measurement results are shown in the paper. An implemented prototype using IBM 90 nm CMOS technology is evaluated using on-wafer probing and packaging. Measurements show a conversion gain of 21 dB across 2-2300 MHz frequency range, an IIP3 of -1.5 dBm at 100 MHz, and minimum and maximum noise figure of 1.4 dB and 1.7 dB from 100 MHz to 2.3 GHz for the on-wafer prototype. The LNA consumes 18 mW from 1.8 V supply and occupies an area of 0.06 mm<sup>2</sup>.IEEE Journal of Solid-State Circuits 06/2011; · 3.23 Impact Factor -
Conference Proceeding: A 2–1100 MHz wideband low noise amplifier with 1.43 dB minimum noise figure
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ABSTRACT: A new wideband low noise amplifier (LNA) is proposed in this paper. The LNA utilizes a composite NMOS/PMOS cross-coupled transistor pair to increase the amplification while reducing the noise figure. The introduced approach provides partial cancellation of noise generated by the input transistors, hence, lowering the overall noise figure. An implemented prototype using IBM 90 nm CMOS technology shows a measured conversion gain of 20 dB across 2-1100 MHz frequency range, an IIP3 of -1.5 dBm at 100 MHz, and minimum and maximum noise figure of 1.43 dB and 1.9 dB from 100 MHz to 1.1 GHz. The LNA consumes 18 mW from 1.8 V supply and occupies an area of 0.06 mm<sup>2</sup>.Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE; 06/2010
