-
[show abstract]
[hide abstract]
ABSTRACT: The conventional continuous scan and Delay- ID , lin methods of negative bias temperature instability characterization are not applicable for polycrystalline silicon thin-film transistors due to significant recovery effect and mobility degradation, respectively. An improved on-the-fly (OTF) method is proposed to simultaneously extract the threshold voltage shift and mobility degradation. In addition, the improved OTF method is more accurate than the continuous scan due to less recovery effect. The exponents of reaction-diffusion mechanism can be clearly determined using the new method.
IEEE Transactions on Electron Devices 12/2010; · 2.32 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: A capacitorless single-transistor (1T) memory cell with a long data-retention time is demonstrated on polycrystalline silicon thin-film transistors (TFTs). A new operation mode using channel traps is employed to modulate the drain current in the accumulation region. The different drain current can be read by modulating the barrier height at the grain boundary. The extrapolated retention time at the half of the current window is ~10<sup>7</sup> s. There is no degradation after 2000 write/erase cycles by trap-assisted tunneling programming. The low-temperature process of the TFT cells is attractive for the 3-D integration.
IEEE Electron Device Letters 11/2010; · 2.85 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: The flatband-voltage shift of metal-oxide-silicon capacitors is investigated under the application of low-level stress (up to 220 MPa of biaxial stress and 380 MPa of uniaxial stress) to different substrate orientations. We propose that the flatband-voltage shift be modeled as the net effect of silicon-band-edge shifts and modulation of the separation between the band edge and the Fermi level under low levels of applied mechanical strain. For the (001) n-type substrate, a negative flatband-voltage shift is observed due mainly to the downward shift of the conduction-band edge, while a positive flatband-voltage shift is observed for the (001) p-type substrate due to the upward shift of the valence-band edge. For the uniaxial tensile strain on n-substrate capacitors for (110) and (111) substrates, the modulation of band-edge and Fermi-level separation by the conduction-band density of states exceeds the downward shift of the conduction band, which induces a positive flatband shift that is distinct from that observed in the (001) n-substrate. The shift of the band edges is determined by the proposed model and compared with theoretical calculations.
IEEE Transactions on Electron Devices 09/2009; · 2.32 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: The dynamic stress switching of p-channel polycrystalline-silicon (poly-Si) thin-film transistors from full depletion to accumulation bias creates the high electric field near source/drain (S/D) junctions due to the slow formation of the accumulated electrons at the SiO<sub>2</sub>/poly -Si interface. The high electric field causes impact ionization near the S/D, where the secondary electrons surmount the SiO<sub>2</sub> barrier and are trapped near the interface. The channel region near the S/D is inverted to p-type by the trapped electrons, and the effective channel length is reduced. The drain current increases with the stress time, particularly for short-channel devices.
IEEE Electron Device Letters 05/2009; · 2.85 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: Positive bias temperature instability in p-channel polycrystalline silicon thin-film transistors is investigated. The stress-induced hump in the subthreshold region is observed and is attributed to the edge transistor along the channel width direction. The electric field at the corner is higher than that at the channel due to thinner gate insulator and larger electric flux density at the corner. The current of edge transistor is independent of the channel width. The electron trapping in the gate insulator via the Fowler-Nordheim tunneling yields the positive voltage shift. As compared to the channel transistor, more trapped electrons at the edge lead to more positive voltage shift and create the hump. The hump is less significant at high temperature due to the thermal excitation of trapped elections via the Frenkel-Poole emission.
IEEE Electron Device Letters 01/2009; · 2.85 Impact Factor