Publications (2)0 Total impact
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Conference Proceeding: 250Mbps-5Gbps wide-range CDR with digital vernier phase shifting and dual mode control in 0.13μm CMOS
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ABSTRACT: A multi-port serial link with a wide-range CDR using digital Vernier phase shifting and dual mode control is presented. The proposed Vernier phase shifter generates fine-resolution phase steps and provides unlimited phase rotating. With the dual mode control, the proposed CDR extends the operating range from 250Mbps to 5Gbps. The proposed CDR provides 13.34ps phase steps at 5Gbps and achieves a BER of less than 10<sup>-12</sup> for the range of 250Mbps to 5Gbps. Fabricated in a 0.13-μm CMOS process, the proposed CDR dissipates 19.2mW at 5Gbps from a 1.2-V supply.Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian; 12/2010 -
Conference Proceeding: A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling
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ABSTRACT: A DLL-based clock generator for dynamic frequency scaling is fabricated in a 0.35 μm CMOS technology. It generates clock signals ranging from 120MHz to 1.8GHz. The frequency can be dynamically changed. If the clock generator scales its output frequency dynamically by programming with the same last bit, it takes only one clock cycle to lock. The proposed clock generator has a jitter of ±6.6ps<sub>pp</sub> at 1.3GHz.Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International; 03/2005
