-
[show abstract]
[hide abstract]
ABSTRACT: Monolithic integration in CMOS has boosted the development of low cost, compact and portable consumer applications. But until now the monolithic integration of DC-DC converters is still omitted in commercial applications. Primarily due to the need for high-efficiency converters and appropriate techniques to control high-frequency capacitive DC-DC converters. This paper presents a fully integrated capacitive step-down DC-DC converter in 90 nm CMOS with an output power capability of 150 mW, a peak efficiency of 77% and a full load efficiency of 74%. The DC-DC converter is controlled by a Single Boundary-Multiphase Control (SB-MC). This control method provides a low power solution for controlling multiphase capacitive DC-DC converters without compromising the control loop bandwidth. This paper describes the design, implementation and measurements of the DC-DC converter.
IEEE Journal of Solid-State Circuits 08/2011; · 3.23 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: A fully integrated dc-dc four-phase step-down converter in a 130-nm 1.2-V CMOS technology is realized with integrated metal-track inductors and integrated MOS and MIM capacitors. The converter requires no external components and is designed to generate an output voltage of 1.2 V out of a 2.6 V supply voltage. The maximum power-conversion efficiency is 58%, for a voltage-conversion ratio of 0.46. This yields a 21% improvement over a linear converter. The maximum output power is 800 mW and the power density of 213 mW/mm<sup>2</sup> is in the same order of magnitude of nonintegrated switching converters, even when not taking their off-chip output filter into account. Stacked transistors are used to cope with the high voltage. A novel control system based on semiconstant ON/OFF time (SCOOT) regulates the output voltage. It also provides stability over the entire load range from 0 to 800 mW. The four-phase topology and the SCOOT control system ensure an output voltage ripple below 10% of the output voltage. The converter operates in discontinuous, synchronous switching mode. The switching frequency varies with the load from 75 kHz to 225 MHz.
IEEE Transactions on Power Electronics 03/2011; · 4.65 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: A gearbox-type capacitive DC/DC converter is presented with an enhanced switch- and capacitor-array. The switch overhead is reduced significantly with respect to a conventional implementation. The presented topologies exhibit a lower swing on the intermediate capacitor nodes so that power loss due to the parasitic capacitances on these nodes is reduced drastically.
Electronics Letters 07/2010; · 0.96 Impact Factor
-
[show abstract]
[hide abstract]
ABSTRACT: Popular capacitive DC/DC converter topologies are optimised and compared towards the total required capacitance. The analysis shows that from an area point of view the series-parallel, Fibonacci and Dickson topologies perform equally. The voltage doubler topology is proven to be inferior.
Electronics Letters 01/2009; · 0.96 Impact Factor
