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Publications (3)0 Total impact

  • Jen-Ta Su, Chih-Wen Liu, De-Min Liu
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    ABSTRACT: In this paper, a novel adaptive control scheme for interleaved DC/DC power converters is proposed to improve the transient response to load current step inputs with high slew rate. The proposed adaptive control scheme is based upon gain scheduling scheme with pole-zero cancellation method to tune the parameters of the proportional-integral-derivative (PID) controller for efficiently improving the output transient response. The proposed adaptive control scheme is verified on a 12 V input with 1.2 V output, 40 A interleaved DC/DC synchronous buck converter and the simulation and experimental results are presented to fully demonstrate the theoretical analysis.
    Power Electronics Conference (IPEC), 2010 International; 07/2010
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    ABSTRACT: The objective of this paper is to demonstrate a fully digital controller for interleaving DC/DC converter. In this paper, a new adaptive control method is proposed to improve the dynamic performance in rapid load current slew rate requirement. This control architecture is according to PID controller with Gain Scheduling architecture and based on pole-zero cancellation method to build the parameters of PID to optimize in transient response. The proposed digital controller is tested on a 12-V input with 1.2-V, 30-A buck converter by FPGA-based and the simulation and experimental results are presented.
    Power Electronics and Drive Systems, 2009. PEDS 2009. International Conference on; 12/2009
  • [show abstract] [hide abstract]
    ABSTRACT: The objective of this paper is to demonstrate a fully digital controller for interleaving DC/DC converter. In this paper, a new adaptive control method is proposed to improve the dynamic performance in rapid load current slew rate requirement. This control architecture is according to PID controller with Gain Scheduling architecture and based on pole-zero cancellation method to build the parameters of PID to optimize in transient response. The proposed digital controller is tested on a 12-V input with 1.2-V, 30-A buck converter by FPGA-based and the simulation and experimental results are presented.